Mary P. Kusko

Person

Hopewell Junction, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
System testing using partitioned and controlled noise
- Patent number 12,174,251
- Issue date Dec 24, 2024
- International Business Machines Corporation
- Mary P. Kusko
- G01 - MEASURING TESTING
Information Patent Grant
User privacy for autonomous vehicles
- Patent number 12,105,834
- Issue date Oct 1, 2024
- International Business Machines Corporation
- Mary P. Kusko
- B60 - VEHICLES IN GENERAL
Information Patent Grant
Diagnostic enhancement for multiple instances of identical structures
- Patent number 11,378,623
- Issue date Jul 5, 2022
- International Business Machines Corporation
- Steven Michael Douskey
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic weight selection process for logic built-in self test
- Patent number 11,112,457
- Issue date Sep 7, 2021
- International Business Machines Corporation
- Mary P. Kusko
- G01 - MEASURING TESTING
Information Patent Grant
Operating pulsed latches on a variable power supply
- Patent number 11,112,854
- Issue date Sep 7, 2021
- International Business Machines Corporation
- Steven M. Douskey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic built-in self test dynamic weight selection method
- Patent number 11,079,433
- Issue date Aug 3, 2021
- International Business Machines Corporation
- Franco Motika
- G01 - MEASURING TESTING
Information Patent Grant
Iterative functional test exerciser reload and execution
- Patent number 10,930,364
- Issue date Feb 23, 2021
- International Business Machines Corporation
- Franco Motika
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamically power noise adaptive automatic test pattern generation
- Patent number 10,816,599
- Issue date Oct 27, 2020
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Grant
Built-in device testing of integrated circuits
- Patent number 10,768,230
- Issue date Sep 8, 2020
- International Business Machines Corporation
- Robert M. Casatuta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic built in self test circuitry for use in an integrated circuit...
- Patent number 10,746,794
- Issue date Aug 18, 2020
- International Business Machines Corporation
- Satya R. S. Bhamidipati
- G01 - MEASURING TESTING
Information Patent Grant
Logic built in self test circuitry for use in an integrated circuit...
- Patent number 10,739,401
- Issue date Aug 11, 2020
- International Business Machines Corporation
- Satya R. S. Bhamidipati
- G01 - MEASURING TESTING
Information Patent Grant
Logic built in self test circuitry for use in an integrated circuit...
- Patent number 10,649,028
- Issue date May 12, 2020
- International Business Machines Corporation
- Satya R. S. Bhamidipati
- G01 - MEASURING TESTING
Information Patent Grant
Non-destructive recirculation test support for integrated circuits
- Patent number 10,613,142
- Issue date Apr 7, 2020
- International Business Machines Corporation
- Mary P. Kusko
- G01 - MEASURING TESTING
Information Patent Grant
Identification of unknown sources for logic built-in self test in v...
- Patent number 10,598,727
- Issue date Mar 24, 2020
- International Business Machines Corporation
- Satya R. S. Bhamidipati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Functional diagnostics based on dynamic selection of alternate cloc...
- Patent number 10,585,142
- Issue date Mar 10, 2020
- International Business Machines Corporation
- Mary P. Kusko
- G01 - MEASURING TESTING
Information Patent Grant
Circuit structures to resolve random testability
- Patent number 10,545,190
- Issue date Jan 28, 2020
- International Business Machines Corporation
- Raghu G. GopalaKrishnaSetty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Functional diagnostics based on dynamic selection of alternate cloc...
- Patent number 10,545,188
- Issue date Jan 28, 2020
- International Business Machines Corporation
- Mary P. Kusko
- G01 - MEASURING TESTING
Information Patent Grant
Circuit structures to resolve random testability
- Patent number 10,527,674
- Issue date Jan 7, 2020
- International Business Machines Corporation
- Raghu G. GopalaKrishnaSetty
- G01 - MEASURING TESTING
Information Patent Grant
Synthesis for random testability using unreachable states in integr...
- Patent number 10,502,782
- Issue date Dec 10, 2019
- International Business Machines Corporation
- Victor N. Kravets
- G01 - MEASURING TESTING
Information Patent Grant
Operating pulsed latches on a variable power supply
- Patent number 10,386,912
- Issue date Aug 20, 2019
- International Business Machines Corporation
- Steven M. Douskey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Minimization of over-masking in an on product multiple input signat...
- Patent number 10,379,159
- Issue date Aug 13, 2019
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Grant
Physically aware scan diagnostic logic and power saving circuit ins...
- Patent number 10,371,747
- Issue date Aug 6, 2019
- International Business Machines Corporation
- William V. Huott
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Removal of over-masking in an on product multiple input signature r...
- Patent number 10,371,749
- Issue date Aug 6, 2019
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Grant
Minimization of over-masking in an on product multiple input signat...
- Patent number 10,371,750
- Issue date Aug 6, 2019
- International Business Machines Corporation
- Steven M. Douskey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implementing over-masking removal in an on product multiple input s...
- Patent number 10,345,380
- Issue date Jul 9, 2019
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Grant
Iterative N-detect based logic diagnostic technique
- Patent number 10,254,336
- Issue date Apr 9, 2019
- International Business Machines Corporation
- Mary P. Kusko
- G01 - MEASURING TESTING
Information Patent Grant
Structurally assisted functional test and diagnostics for integrate...
- Patent number 10,247,776
- Issue date Apr 2, 2019
- International Business Machines Corporation
- Mary P. Kusko
- G01 - MEASURING TESTING
Information Patent Grant
Scan chain latency reduction
- Patent number 10,168,386
- Issue date Jan 1, 2019
- International Business Machines Corporation
- George Antony
- G01 - MEASURING TESTING
Information Patent Grant
Dynamic fault model generation for diagnostics simulation and patte...
- Patent number 10,169,510
- Issue date Jan 1, 2019
- International Business Machines Corporation
- Mary P. Kusko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bitwise rotating scan section for microelectronic chip testing and...
- Patent number 10,107,860
- Issue date Oct 23, 2018
- International Business Machines Corporation
- Todd L. Cohen
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM TESTING USING PARTITIONED AND CONTROLLED NOISE
- Publication number 20230094107
- Publication date Mar 30, 2023
- International Business Machines Corporation
- Mary P. Kusko
- G01 - MEASURING TESTING
Information Patent Application
DIAGNOSTIC ENHANCEMENT FOR MULTIPLE INSTANCES OF IDENTICAL STRUCTURES
- Publication number 20220178996
- Publication date Jun 9, 2022
- International Business Machines Corporation
- Steven Michael DOUSKEY
- G11 - INFORMATION STORAGE
Information Patent Application
USER PRIVACY FOR AUTONOMOUS VEHICLES
- Publication number 20220027501
- Publication date Jan 27, 2022
- International Business Machines Corporation
- Mary P. Kusko
- B60 - VEHICLES IN GENERAL
Information Patent Application
DYNAMIC WEIGHT SELECTION PROCESS FOR LOGIC BUILT-IN SELF TEST
- Publication number 20210156910
- Publication date May 27, 2021
- International Business Machines Corporation
- Mary P. Kusko
- G01 - MEASURING TESTING
Information Patent Application
LOGIC BUILT-IN SELF TEST DYNAMIC WEIGHT SELECTION METHOD
- Publication number 20210156911
- Publication date May 27, 2021
- International Business Machines Corporation
- Franco Motika
- G01 - MEASURING TESTING
Information Patent Application
DYNAMICALLY POWER NOISE ADAPTIVE AUTOMATIC TEST PATTERN GENERATION
- Publication number 20200225283
- Publication date Jul 16, 2020
- International Business Machines Corporation
- Steven M. DOUSKEY
- G01 - MEASURING TESTING
Information Patent Application
ITERATIVE FUNCTIONAL TEST EXERCISER RELOAD AND EXECUTION
- Publication number 20200160932
- Publication date May 21, 2020
- International Business Machines Corporation
- Franco Motika
- G11 - INFORMATION STORAGE
Information Patent Application
OPERATING PULSED LATCHES ON A VARIABLE POWER SUPPLY
- Publication number 20190286221
- Publication date Sep 19, 2019
- International Business Machines Corporation
- STEVEN M. DOUSKEY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYNTHESIS FOR RANDOM TESTABILITY USING UNREACHABLE STATES IN INTEGR...
- Publication number 20190146031
- Publication date May 16, 2019
- International Business Machines Corporation
- Victor N. Kravets
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FUNCTIONAL DIAGNOSTICS BASED ON DYNAMIC SELECTION OF ALTERNATE CLOC...
- Publication number 20190094297
- Publication date Mar 28, 2019
- International Business Machines Corporation
- Mary P. Kusko
- G01 - MEASURING TESTING
Information Patent Application
FUNCTIONAL DIAGNOSTICS BASED ON DYNAMIC SELECTION OF ALTERNATE CLOC...
- Publication number 20190094298
- Publication date Mar 28, 2019
- International Business Machines Corporation
- Mary P. Kusko
- G01 - MEASURING TESTING
Information Patent Application
CIRCUIT STRUCTURES TO RESOLVE RANDOM TESTABILITY
- Publication number 20190056450
- Publication date Feb 21, 2019
- International Business Machines Corporation
- Raghu G. GopalaKrishnaSetty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUIT STRUCTURES TO RESOLVE RANDOM TESTABILITY
- Publication number 20190056449
- Publication date Feb 21, 2019
- International Business Machines Corporation
- Raghu G. GopalaKrishnaSetty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGIC BUILT IN SELF TEST CIRCUITRY FOR USE IN AN INTEGRATED CIRCUIT...
- Publication number 20180306858
- Publication date Oct 25, 2018
- International Business Machines Corporation
- Satya R.S. Bhamidipati
- G01 - MEASURING TESTING
Information Patent Application
ITERATIVE N-DETECT BASED LOGIC DIAGNOSTIC TECHNIQUE
- Publication number 20180252769
- Publication date Sep 6, 2018
- International Business Machines Corporation
- Mary P. Kusko
- G01 - MEASURING TESTING
Information Patent Application
NON-DESTRUCTIVE RECIRCULATION TEST SUPPORT FOR INTEGRATED CIRCUITS
- Publication number 20180238964
- Publication date Aug 23, 2018
- International Business Machines Corporation
- Mary P. Kusko
- G01 - MEASURING TESTING
Information Patent Application
STRUCTURALLY ASSISTED FUNCTIONAL TEST AND DIAGNOSTICS FOR INTEGRATE...
- Publication number 20180238962
- Publication date Aug 23, 2018
- International Business Machines Corporation
- Mary P. Kusko
- G01 - MEASURING TESTING
Information Patent Application
SCAN CHAIN LATENCY REDUCTION
- Publication number 20180203064
- Publication date Jul 19, 2018
- International Business Machines Corporation
- George Antony
- G01 - MEASURING TESTING
Information Patent Application
SCAN CHAIN LATENCY REDUCTION
- Publication number 20180203066
- Publication date Jul 19, 2018
- International Business Machines Corporation
- George Antony
- G01 - MEASURING TESTING
Information Patent Application
OPERATING PULSED LATCHES ON A VARIABLE POWER SUPPLY
- Publication number 20180196497
- Publication date Jul 12, 2018
- International Business Machines Corporation
- STEVEN M. DOUSKEY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC FAULT MODEL GENERATION FOR DIAGNOSTICS SIMULATION AND PATTE...
- Publication number 20180075170
- Publication date Mar 15, 2018
- International Business Machines Corporation
- Mary P. Kusko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADJUSTING LATENCY IN A SCAN CELL
- Publication number 20180052198
- Publication date Feb 22, 2018
- International Business Machines Corporation
- Steven M. DOUSKEY
- G01 - MEASURING TESTING
Information Patent Application
ADJUSTING LATENCY IN A SCAN CELL
- Publication number 20180052199
- Publication date Feb 22, 2018
- International Business Machines Corporation
- Steven M. DOUSKEY
- G01 - MEASURING TESTING
Information Patent Application
PORTION ISOLATION ARCHITECTURE FOR CHIP ISOLATION TEST
- Publication number 20170363683
- Publication date Dec 21, 2017
- International Business Machines Corporation
- Steven M. Douskey
- G01 - MEASURING TESTING
Information Patent Application
BITWISE ROTATING SCAN SECTION FOR MICROELECTRONIC CHIP TESTING AND...
- Publication number 20170363684
- Publication date Dec 21, 2017
- International Business Machines Corporation
- Todd L. Cohen
- G01 - MEASURING TESTING
Information Patent Application
BUILT-IN DEVICE TESTING OF INTEGRATED CIRCUITS
- Publication number 20170343601
- Publication date Nov 30, 2017
- International Business Machines Corporation
- Robert M. Casatuta
- G01 - MEASURING TESTING
Information Patent Application
IDENTIFICATION OF UNKNOWN SOURCES FOR LOGIC BUILT-IN SELF TEST IN V...
- Publication number 20170285104
- Publication date Oct 5, 2017
- International Business Machines Corporation
- Satya R. S. Bhamidipati
- G01 - MEASURING TESTING
Information Patent Application
BYPASSING AN ENCODED LATCH ON A CHIP DURING A TEST-PATTERN SCAN
- Publication number 20170261550
- Publication date Sep 14, 2017
- International Business Machines Corporation
- Michael Fee
- G01 - MEASURING TESTING
Information Patent Application
BYPASSING AN ENCODED LATCH ON A CHIP DURING A TEST-PATTERN SCAN
- Publication number 20170261555
- Publication date Sep 14, 2017
- International Business Machines Corporation
- Michael Fee
- G01 - MEASURING TESTING
Information Patent Application
CLOCK PATH TECHNIQUE FOR USING ON-CHIP CIRCUITRY TO GENERATE A CORR...
- Publication number 20170261556
- Publication date Sep 14, 2017
- International Business Machines Corporation
- Michael Fee
- G01 - MEASURING TESTING

Mary P. Kusko

Person

Patents Grantslast 30 patents

System testing using partitioned and controlled noise

User privacy for autonomous vehicles

Diagnostic enhancement for multiple instances of identical structures

Dynamic weight selection process for logic built-in self test

Operating pulsed latches on a variable power supply

Logic built-in self test dynamic weight selection method

Iterative functional test exerciser reload and execution

Dynamically power noise adaptive automatic test pattern generation

Built-in device testing of integrated circuits

Logic built in self test circuitry for use in an integrated circuit...

Logic built in self test circuitry for use in an integrated circuit...

Logic built in self test circuitry for use in an integrated circuit...

Non-destructive recirculation test support for integrated circuits

Identification of unknown sources for logic built-in self test in v...

Functional diagnostics based on dynamic selection of alternate cloc...

Circuit structures to resolve random testability

Functional diagnostics based on dynamic selection of alternate cloc...

Circuit structures to resolve random testability

Synthesis for random testability using unreachable states in integr...

Operating pulsed latches on a variable power supply

Minimization of over-masking in an on product multiple input signat...

Physically aware scan diagnostic logic and power saving circuit ins...

Removal of over-masking in an on product multiple input signature r...

Minimization of over-masking in an on product multiple input signat...

Implementing over-masking removal in an on product multiple input s...

Iterative N-detect based logic diagnostic technique

Structurally assisted functional test and diagnostics for integrate...

Scan chain latency reduction

Dynamic fault model generation for diagnostics simulation and patte...

Bitwise rotating scan section for microelectronic chip testing and...

Patents Applicationslast 30 patents

SYSTEM TESTING USING PARTITIONED AND CONTROLLED NOISE

DIAGNOSTIC ENHANCEMENT FOR MULTIPLE INSTANCES OF IDENTICAL STRUCTURES

USER PRIVACY FOR AUTONOMOUS VEHICLES

DYNAMIC WEIGHT SELECTION PROCESS FOR LOGIC BUILT-IN SELF TEST

LOGIC BUILT-IN SELF TEST DYNAMIC WEIGHT SELECTION METHOD

DYNAMICALLY POWER NOISE ADAPTIVE AUTOMATIC TEST PATTERN GENERATION

ITERATIVE FUNCTIONAL TEST EXERCISER RELOAD AND EXECUTION

OPERATING PULSED LATCHES ON A VARIABLE POWER SUPPLY

SYNTHESIS FOR RANDOM TESTABILITY USING UNREACHABLE STATES IN INTEGR...

FUNCTIONAL DIAGNOSTICS BASED ON DYNAMIC SELECTION OF ALTERNATE CLOC...

FUNCTIONAL DIAGNOSTICS BASED ON DYNAMIC SELECTION OF ALTERNATE CLOC...

CIRCUIT STRUCTURES TO RESOLVE RANDOM TESTABILITY

CIRCUIT STRUCTURES TO RESOLVE RANDOM TESTABILITY

LOGIC BUILT IN SELF TEST CIRCUITRY FOR USE IN AN INTEGRATED CIRCUIT...

ITERATIVE N-DETECT BASED LOGIC DIAGNOSTIC TECHNIQUE

NON-DESTRUCTIVE RECIRCULATION TEST SUPPORT FOR INTEGRATED CIRCUITS

STRUCTURALLY ASSISTED FUNCTIONAL TEST AND DIAGNOSTICS FOR INTEGRATE...

SCAN CHAIN LATENCY REDUCTION

SCAN CHAIN LATENCY REDUCTION

OPERATING PULSED LATCHES ON A VARIABLE POWER SUPPLY

DYNAMIC FAULT MODEL GENERATION FOR DIAGNOSTICS SIMULATION AND PATTE...

ADJUSTING LATENCY IN A SCAN CELL

ADJUSTING LATENCY IN A SCAN CELL

PORTION ISOLATION ARCHITECTURE FOR CHIP ISOLATION TEST

BITWISE ROTATING SCAN SECTION FOR MICROELECTRONIC CHIP TESTING AND...

BUILT-IN DEVICE TESTING OF INTEGRATED CIRCUITS

IDENTIFICATION OF UNKNOWN SOURCES FOR LOGIC BUILT-IN SELF TEST IN V...

BYPASSING AN ENCODED LATCH ON A CHIP DURING A TEST-PATTERN SCAN

BYPASSING AN ENCODED LATCH ON A CHIP DURING A TEST-PATTERN SCAN

CLOCK PATH TECHNIQUE FOR USING ON-CHIP CIRCUITRY TO GENERATE A CORR...