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Masafumi Watanabe

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  • Kanagawa, JP
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Patents Grantslast 30 patents

  • Information Patent Grant

    Clock control circuit, demodulation device and spread spectrum method
    • Patent number 10,063,277
    • Issue date Aug 28, 2018
    • Renesas Electronics Corporation
    • Atsushi Nakamura
    • H04 - ELECTRIC COMMUNICATION TECHNIQUE
  • Information Patent Grant

    Clock control circuit, demodulation device and spread spectrum method
    • Patent number 9,729,194
    • Issue date Aug 8, 2017
    • Renesas Electronics Corporation
    • Atsushi Nakamura
    • H04 - ELECTRIC COMMUNICATION TECHNIQUE
  • Information Patent Grant

    Digital phase-locked loop
    • Patent number 7,990,191
    • Issue date Aug 2, 2011
    • Renesas Electronics Corporation
    • Satoshi Fujino
    • H03 - BASIC ELECTRONIC CIRCUITRY
  • Information Patent Grant

    PLL circuit
    • Patent number 7,595,671
    • Issue date Sep 29, 2009
    • NEC Electronics Corporation
    • Masafumi Watanabe
    • H03 - BASIC ELECTRONIC CIRCUITRY
  • Information Patent Grant

    Signal conversion circuit
    • Patent number 7,564,293
    • Issue date Jul 21, 2009
    • NEC Electronics Corporation
    • Masafumi Watanabe
    • H03 - BASIC ELECTRONIC CIRCUITRY
  • Information Patent Grant

    PLL circuit
    • Patent number 7,545,223
    • Issue date Jun 9, 2009
    • NEC Electronics Corporation
    • Masafumi Watanabe
    • H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

  • Information Patent Application

    CLOCK CONTROL CIRCUIT, DEMODULATION DEVICE AND SPREAD SPECTRUM METHOD
    • Publication number 20170310356
    • Publication date Oct 26, 2017
    • RENESAS ELECTRONICS CORPORATION
    • Atsushi NAKAMURA
    • H04 - ELECTRIC COMMUNICATION TECHNIQUE
  • Information Patent Application

    CLOCK CONTROL CIRCUIT, DEMODULATION DEVICE AND SPREAD SPECTRUM METHOD
    • Publication number 20130182747
    • Publication date Jul 18, 2013
    • RENESAS ELECTRONICS CORPORATION
    • Atsushi NAKAMURA
    • H04 - ELECTRIC COMMUNICATION TECHNIQUE
  • Information Patent Application

    Digital phase-locked loop
    • Publication number 20100182060
    • Publication date Jul 22, 2010
    • NEC Electronics Corporation
    • Satoshi Fujino
    • H03 - BASIC ELECTRONIC CIRCUITRY
  • Information Patent Application

    PLL circuit
    • Publication number 20080068090
    • Publication date Mar 20, 2008
    • NEC Electronics Corporation
    • Masafumi Watanabe
    • H03 - BASIC ELECTRONIC CIRCUITRY
  • Information Patent Application

    Pll circuit
    • Publication number 20080061850
    • Publication date Mar 13, 2008
    • NEC Electronics Corporation
    • Masafumi Watanabe
    • H03 - BASIC ELECTRONIC CIRCUITRY
  • Information Patent Application

    PLL circuit
    • Publication number 20080042759
    • Publication date Feb 21, 2008
    • NEC Electronics Corporation
    • Masafumi Watanabe
    • H03 - BASIC ELECTRONIC CIRCUITRY
  • Information Patent Application

    Digital control oscillator
    • Publication number 20060285619
    • Publication date Dec 21, 2006
    • NEC Electronics Corporation
    • Masafumi Watanabe
    • H03 - BASIC ELECTRONIC CIRCUITRY
  • Information Patent Application

    Signal conversion circuit
    • Publication number 20060214719
    • Publication date Sep 28, 2006
    • NEC Electronics Corporation
    • Masafumi Watanabe
    • H03 - BASIC ELECTRONIC CIRCUITRY