Masashi NAKATA

Person

Yokohama, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor integrated circuit and semiconductor device
- Patent number 10,535,385
- Issue date Jan 14, 2020
- TOSHIBA MEMORY CORPORATION
- Nobuhiro Tsuji
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit and semiconductor device
- Patent number 10,403,341
- Issue date Sep 3, 2019
- TOSHIBA MEMORY CORPORATION
- Nobuhiro Tsuji
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit, DLL circuit, and duty cycle corre...
- Patent number 10,305,497
- Issue date May 28, 2019
- TOSHIBA MEMORY CORPORATION
- Masashi Nakata
- G11 - INFORMATION STORAGE
Information Patent Grant
Phase-locked loop circuit
- Patent number 9,973,197
- Issue date May 15, 2018
- TOSHIBA MEMORY CORPORATION
- Masashi Nakata
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Receiving device
- Patent number 9,967,083
- Issue date May 8, 2018
- TOSHIBA MEMORY CORPORATION
- Hiroo Yabe
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory system and control method of memory system
- Patent number 9,940,274
- Issue date Apr 10, 2018
- TOSHIBA MEMORY CORPORATION
- Daisuke Nakata
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device
- Patent number 9,935,621
- Issue date Apr 3, 2018
- TOSHIBA MEMORY CORPORATION
- Masashi Nakata
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Duty cycle correction circuit and semiconductor device
- Patent number 9,369,118
- Issue date Jun 14, 2016
- Kabushiki Kaisha Toshiba
- Masashi Nakata
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR INTEGRATED CIRCUIT AND SEMICONDUCTOR DEVICE
- Publication number 20190348093
- Publication date Nov 14, 2019
- Toshiba Memory Corporation
- Nobuhiro TSUJI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR INTEGRATED CIRCUIT, DLL CIRCUIT, AND DUTY CYCLE CORRE...
- Publication number 20190081631
- Publication date Mar 14, 2019
- Toshiba Memory Corporation
- Masashi NAKATA
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR INTEGRATED CIRCUIT AND SEMICONDUCTOR DEVICE
- Publication number 20190080734
- Publication date Mar 14, 2019
- Toshiba Memory Corporation
- Nobuhiro TSUJI
- G11 - INFORMATION STORAGE
Information Patent Application
RECEIVING DEVICE
- Publication number 20180069689
- Publication date Mar 8, 2018
- Toshiba Memory Corporation
- Hiroo YABE
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PHASE-LOCKED LOOP CIRCUIT
- Publication number 20180069555
- Publication date Mar 8, 2018
- Toshiba Memory Corporation
- Masashi NAKATA
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20170077915
- Publication date Mar 16, 2017
- KABUSHIKI KAISHA TOSHIBA
- MASASHI NAKATA
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DUTY CYCLE CORRECTION CIRCUIT AND SEMICONDUCTOR DEVICE
- Publication number 20160013785
- Publication date Jan 14, 2016
- KABUSHIKI KAISHA TOSHIBA
- Masashi NAKATA
- H03 - BASIC ELECTRONIC CIRCUITRY

Masashi NAKATA

Person

Patents Grantslast 30 patents

Semiconductor integrated circuit and semiconductor device

Semiconductor integrated circuit and semiconductor device

Semiconductor integrated circuit, DLL circuit, and duty cycle corre...

Phase-locked loop circuit

Receiving device

Memory system and control method of memory system

Semiconductor device

Duty cycle correction circuit and semiconductor device

Patents Applicationslast 30 patents

SEMICONDUCTOR INTEGRATED CIRCUIT AND SEMICONDUCTOR DEVICE

SEMICONDUCTOR INTEGRATED CIRCUIT, DLL CIRCUIT, AND DUTY CYCLE CORRE...

SEMICONDUCTOR INTEGRATED CIRCUIT AND SEMICONDUCTOR DEVICE

RECEIVING DEVICE

PHASE-LOCKED LOOP CIRCUIT

SEMICONDUCTOR DEVICE

DUTY CYCLE CORRECTION CIRCUIT AND SEMICONDUCTOR DEVICE