Masayuki Moroi

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Garland, TX, US

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Patents Grantslast 30 patents

Information Patent Grant
Reduced size plate layer improves misalignments for CUB DRAM
- Patent number 6,873,001
- Issue date Mar 29, 2005
- Texas Instruments Incorporated
- Toshiyuki Nagata
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating an open can-type stacked capacitor on an une...
- Patent number 6,580,112
- Issue date Jun 17, 2003
- Texas Instruments Incorporated
- Yoichi Miyai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating an open can-type stacked capacitor on an une...
- Patent number 6,291,293
- Issue date Sep 18, 2001
- Texas Instruments Incorporated
- Yoichi Miyai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabrication an open can-type stacked capacitor on local...
- Patent number 6,204,118
- Issue date Mar 20, 2001
- Texas Instruments Incorporated
- Yoichi Miyai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor wafer orientation device
- Patent number 5,052,886
- Issue date Oct 1, 1991
- Texas Instruments Incorporated
- Masayuki Moroi
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Reduced size plate layer improves misalignments in CUB DRAM
- Publication number 20050030804
- Publication date Feb 10, 2005
- Toshiyuki Nagata
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for fabricating an open can-type stacked capacitor on an une...
- Publication number 20010031530
- Publication date Oct 18, 2001
- Yoichi Miyai
- H01 - BASIC ELECTRIC ELEMENTS