Mate Jenei

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Espoo, FI

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Patents Grantslast 30 patents

Information Patent Grant
Electroplating for vertical interconnections
- Patent number 12,150,388
- Issue date Nov 19, 2024
- IQM Finland Oy
- Máté Jenei
Information Patent Grant
Chip fabrication method and product including raised and recessed a...
- Patent number 12,074,114
- Issue date Aug 27, 2024
- IQM Finland Oy
- Máté Jenei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional superconducting qubit and a method for manufactur...
- Patent number 11,907,805
- Issue date Feb 20, 2024
- IQM Finland Oy
- Caspar Ockeloen-Korppi
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CHIP FABRICATION METHOD AND PRODUCT
- Publication number 20240071944
- Publication date Feb 29, 2024
- IQM Finland Oy
- Máté JENEI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUPERCONDUCTING THROUGH SUBSTRATE VIAS
- Publication number 20220359415
- Publication date Nov 10, 2022
- IQM Finland Oy
- Máté Jenei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTROPLATING FOR VERTICAL INTERCONNECTIONS
- Publication number 20220359808
- Publication date Nov 10, 2022
- IQM Finland Oy
- Máté Jenei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL SUPERCONDUCTING QUBIT AND A METHOD FOR MANUFACTUR...
- Publication number 20220164690
- Publication date May 26, 2022
- IQM Finland Oy
- Caspar Ockeloen-Korppi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
QUANTUM COMPUTING CIRCUIT COMPRISING A PLURALITY OF CHIPS AND METHO...
- Publication number 20220012617
- Publication date Jan 13, 2022
- IQM Finland Oy
- Juha Hassel
- G06 - COMPUTING CALCULATING COUNTING