Matthew A. Prather

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Error injection methods using soft post-package repair (sPPR) techn...
- Patent number 12,197,766
- Issue date Jan 14, 2025
- Micron Technology, Inc.
- Randall J. Rooney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Buffer configurations for communications between memory dies and a...
- Patent number 12,170,127
- Issue date Dec 17, 2024
- Micron Technology, Inc.
- Sujeet V. Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory mapping for memory, memory modules, and non-volatile memory
- Patent number 12,164,919
- Issue date Dec 10, 2024
- Frank F. Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power management in memory
- Patent number 12,135,600
- Issue date Nov 5, 2024
- Frank F. Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Command bus in memory
- Patent number 12,067,276
- Issue date Aug 20, 2024
- Frank F. Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error check and scrub for semiconductor memory device
- Patent number 12,056,008
- Issue date Aug 6, 2024
- Randall J. Rooney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for error count reporting with scaled error count informati...
- Patent number 11,977,444
- Issue date May 7, 2024
- Matthew A. Prather
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for power management using loopback
- Patent number 11,960,717
- Issue date Apr 16, 2024
- Thomas H. Kinsley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Indicating a blocked repair operation
- Patent number 11,948,655
- Issue date Apr 2, 2024
- Micron Technology, Inc.
- Seth A. Eichmeyer
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and systems having ball grid arrays and associated micr...
- Patent number 11,942,404
- Issue date Mar 26, 2024
- Micron Technology, Inc.
- Matthew B. Leslie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory devices configured to provide external regulated voltages
- Patent number 11,922,990
- Issue date Mar 5, 2024
- Matthew A. Prather
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for configuring I/Os of memory for hybrid m...
- Patent number 11,886,754
- Issue date Jan 30, 2024
- Matthew A. Prather
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for triggering oscilloscopes and oscilloscopes employing th...
- Patent number 11,867,726
- Issue date Jan 9, 2024
- Micron Technology, Inc.
- Daniel B. Stewart
- G01 - MEASURING TESTING
Information Patent Grant
Methods for providing device status in response to read commands di...
- Patent number 11,854,655
- Issue date Dec 26, 2023
- Matthew A. Prather
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Routing assignments based on error correction capabilities
- Patent number 11,803,501
- Issue date Oct 31, 2023
- Micron Technology, Inc.
- Scott E. Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Refresh operation in multi-die memory
- Patent number 11,783,882
- Issue date Oct 10, 2023
- Matthew A. Prather
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory mapping for memory, memory modules, and non-volatile memory
- Patent number 11,775,300
- Issue date Oct 3, 2023
- Micron Technology, Inc.
- Frank F. Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for performing multiple memory operations in response to a...
- Patent number 11,775,459
- Issue date Oct 3, 2023
- Matthew A. Prather
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Background operations in memory
- Patent number 11,762,582
- Issue date Sep 19, 2023
- Micron Technology, Inc.
- Frank F. Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for error count reporting with scaled error count informati...
- Patent number 11,698,831
- Issue date Jul 11, 2023
- Micron Technology, Inc.
- Matthew A. Prather
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error check and scrub for semiconductor memory device
- Patent number 11,687,410
- Issue date Jun 27, 2023
- Micron Technology, Inc.
- Randall J. Rooney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses, systems, and methods for identifying multi-bit errors
- Patent number 11,646,751
- Issue date May 9, 2023
- Micron Technology, Inc.
- Markus H. Geiger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual speed memory
- Patent number 11,620,088
- Issue date Apr 4, 2023
- Micron Technology, Inc.
- Frank F. Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction in row hammer mitigation and target row refresh
- Patent number 11,604,694
- Issue date Mar 14, 2023
- Micron Technology, Inc.
- Randall J. Rooney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Word line characteristics monitors for memory devices and associate...
- Patent number 11,594,298
- Issue date Feb 28, 2023
- Micron Technology, Inc.
- Matthew A. Prather
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods for on-die memory termination and memory devices and system...
- Patent number 11,586,386
- Issue date Feb 21, 2023
- Micron Technology, Inc.
- Eric J. Stave
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for on-die memory termination and memory devices and system...
- Patent number 11,545,199
- Issue date Jan 3, 2023
- Micron Technology, Inc.
- Gary Howe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory module multiple port buffer techniques
- Patent number 11,538,508
- Issue date Dec 27, 2022
- Micron Technology, Inc.
- Jasper S. Gibbons
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory mapping using commands to transfer data and/or perform logic...
- Patent number 11,474,820
- Issue date Oct 18, 2022
- Micron Technology, Inc.
- Frank F. Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Individually addressing memory devices disconnected from a data bus
- Patent number 11,436,169
- Issue date Sep 6, 2022
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
POWER MANAGEMENT IN MEMORY
- Publication number 20240393860
- Publication date Nov 28, 2024
- Lodestar Licensing Group LLC
- Frank F. Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR CHECK AND SCRUB FOR SEMICONDUCTOR MEMORY DEVICE
- Publication number 20240370336
- Publication date Nov 7, 2024
- Lodestar Licensing Group LLC
- Randall J. Rooney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METADATA COMMUNICATION BY A MEMORY DEVICE
- Publication number 20240354028
- Publication date Oct 24, 2024
- Micron Technology, Inc.
- Sujeet V. Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR POWER MANAGEMENT USING LOOPBACK
- Publication number 20240311001
- Publication date Sep 19, 2024
- Lodestar Licensing Group LLC
- Thomas H. Kinsley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS FOR ERROR COUNT REPORTING WITH SCALED ERROR COUNT INFORMATI...
- Publication number 20240289219
- Publication date Aug 29, 2024
- Lodestar Licensing Group LLC
- Matthew A. Prather
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BACKGROUND OPERATIONS IN MEMORY
- Publication number 20240256182
- Publication date Aug 1, 2024
- Lodestar Licensing Group LLC
- Frank F. Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MAPPING FOR MEMORY, MEMORY MODULES, AND NON-VOLATILE MEMORY
- Publication number 20240231824
- Publication date Jul 11, 2024
- Lodestar Licensing Group LLC
- Frank F. Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS FOR PROVIDING DEVICE STATUS IN RESPONSE TO READ COMMANDS DI...
- Publication number 20240203464
- Publication date Jun 20, 2024
- Lodestar Licensing Group LLC
- Matthew A. Prather
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICES CONFIGURED TO PROVIDE EXTERNAL REGULATED VOLTAGES
- Publication number 20240203479
- Publication date Jun 20, 2024
- Lodestar Licensing Group LLC
- Matthew A. Prather
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REFRESH OPERATION IN MULTI-DIE MEMORY
- Publication number 20240170035
- Publication date May 23, 2024
- Lodestar Licensing Group LLC
- Matthew A. Prather
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR CONFIGURING I/Os OF MEMORY FOR HYBRID M...
- Publication number 20240152297
- Publication date May 9, 2024
- Lodestar Licensing Group LLC
- Matthew A. Prather
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MAPPING FOR MEMORY, MEMORY MODULES, AND NON-VOLATILE MEMORY
- Publication number 20240134646
- Publication date Apr 25, 2024
- Lodestar Licensing Group LLC
- Frank F. Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS FOR PERFORMING MULTIPLE MEMORY OPERATIONS IN RESPONSE TO A...
- Publication number 20240126707
- Publication date Apr 18, 2024
- Lodestar Licensing Group LLC
- Matthew A. Prather
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMBINED MEMORY MODULE LOGIC DEVICES FOR REDUCED COST AND IMPROVED...
- Publication number 20240069762
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Matthew A. Prather
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR CHECK AND SCRUB FOR SEMICONDUCTOR MEMORY DEVICE
- Publication number 20240004755
- Publication date Jan 4, 2024
- Micron Technology, Inc.
- Randall J. Rooney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOOPBACK DATAPATH FOR CLOCK QUALITY DETECTION
- Publication number 20230395175
- Publication date Dec 7, 2023
- Micron Technology, Inc.
- Matthew Alan Prather
- G11 - INFORMATION STORAGE
Information Patent Application
WRITE COMMAND TIMING ENHANCEMENT
- Publication number 20230367709
- Publication date Nov 16, 2023
- Micron Technology, Inc.
- Sujeet V. Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMAND BUS IN MEMORY
- Publication number 20230342058
- Publication date Oct 26, 2023
- Micron Technology, Inc.
- Frank F. Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INDICATING A BLOCKED REPAIR OPERATION
- Publication number 20230343409
- Publication date Oct 26, 2023
- Micron Technology, Inc.
- Seth A. Eichmeyer
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS FOR ERROR COUNT REPORTING WITH SCALED ERROR COUNT INFORMATI...
- Publication number 20230297472
- Publication date Sep 21, 2023
- Micron Technology, Inc.
- Matthew A. Prather
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUFFER CONFIGURATIONS FOR COMMUNICATIONS BETWEEN MEMORY DIES AND A...
- Publication number 20230206969
- Publication date Jun 29, 2023
- Micron Technology, Inc.
- Sujeet V. Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES WITH MULTIPLE PSEUDO-CHANNELS
- Publication number 20230205712
- Publication date Jun 29, 2023
- Micron Technology, Inc.
- Matthew A. Prather
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MODULE MULTIPLE PORT BUFFER TECHNIQUES
- Publication number 20230127970
- Publication date Apr 27, 2023
- Micron Technology, Inc.
- Jasper S. Gibbons
- G11 - INFORMATION STORAGE
Information Patent Application
Routing Assignments Based on Error Correction Capabilities
- Publication number 20230121163
- Publication date Apr 20, 2023
- Micron Technology, Inc.
- Scott E. Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MAPPING FOR MEMORY, MEMORY MODULES, AND NON-VOLATILE MEMORY
- Publication number 20230027332
- Publication date Jan 26, 2023
- Micron Technology, Inc.
- Frank F. Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INDIVIDUALLY ADDRESSING MEMORY DEVICES DISCONNECTED FROM A DATA BUS
- Publication number 20220414034
- Publication date Dec 29, 2022
- Micron Technology, Inc.
- Scott E. Schaefer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES, SYSTEMS, AND METHODS FOR IDENTIFYING MULTI-BIT ERRORS
- Publication number 20220399902
- Publication date Dec 15, 2022
- Micron Technology, Inc.
- Markus H. Geiger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR CONFIGURING I/Os OF MEMORY FOR HYBRID M...
- Publication number 20220334777
- Publication date Oct 20, 2022
- Micron Technology, Inc.
- Matthew A. Prather
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WORD LINE CHARACTERISTICS MONITORS FOR MEMORY DEVICES AND ASSOCIATE...
- Publication number 20220284979
- Publication date Sep 8, 2022
- Micron Technology, Inc.
- Matthew A. Prather
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS FOR PERFORMING MULTIPLE MEMORY OPERATIONS IN RESPONSE TO A...
- Publication number 20220229791
- Publication date Jul 21, 2022
- Micron Technology, Inc.
- Matthew A. Prather
- G06 - COMPUTING CALCULATING COUNTING

Matthew A. Prather

Person

Patents Grantslast 30 patents

Error injection methods using soft post-package repair (sPPR) techn...

Buffer configurations for communications between memory dies and a...

Memory mapping for memory, memory modules, and non-volatile memory

Power management in memory

Command bus in memory

Error check and scrub for semiconductor memory device

Methods for error count reporting with scaled error count informati...

Techniques for power management using loopback

Indicating a blocked repair operation

Apparatuses and systems having ball grid arrays and associated micr...

Memory devices configured to provide external regulated voltages

Apparatuses and methods for configuring I/Os of memory for hybrid m...

Methods for triggering oscilloscopes and oscilloscopes employing th...

Methods for providing device status in response to read commands di...

Routing assignments based on error correction capabilities

Refresh operation in multi-die memory

Memory mapping for memory, memory modules, and non-volatile memory

Methods for performing multiple memory operations in response to a...

Background operations in memory

Methods for error count reporting with scaled error count informati...

Error check and scrub for semiconductor memory device

Apparatuses, systems, and methods for identifying multi-bit errors

Dual speed memory

Error correction in row hammer mitigation and target row refresh

Word line characteristics monitors for memory devices and associate...

Methods for on-die memory termination and memory devices and system...

Methods for on-die memory termination and memory devices and system...

Memory module multiple port buffer techniques

Memory mapping using commands to transfer data and/or perform logic...

Individually addressing memory devices disconnected from a data bus

Patents Applicationslast 30 patents

POWER MANAGEMENT IN MEMORY

ERROR CHECK AND SCRUB FOR SEMICONDUCTOR MEMORY DEVICE

METADATA COMMUNICATION BY A MEMORY DEVICE

TECHNIQUES FOR POWER MANAGEMENT USING LOOPBACK

METHODS FOR ERROR COUNT REPORTING WITH SCALED ERROR COUNT INFORMATI...

BACKGROUND OPERATIONS IN MEMORY

MEMORY MAPPING FOR MEMORY, MEMORY MODULES, AND NON-VOLATILE MEMORY

METHODS FOR PROVIDING DEVICE STATUS IN RESPONSE TO READ COMMANDS DI...

MEMORY DEVICES CONFIGURED TO PROVIDE EXTERNAL REGULATED VOLTAGES

REFRESH OPERATION IN MULTI-DIE MEMORY

APPARATUSES AND METHODS FOR CONFIGURING I/Os OF MEMORY FOR HYBRID M...

MEMORY MAPPING FOR MEMORY, MEMORY MODULES, AND NON-VOLATILE MEMORY

METHODS FOR PERFORMING MULTIPLE MEMORY OPERATIONS IN RESPONSE TO A...

COMBINED MEMORY MODULE LOGIC DEVICES FOR REDUCED COST AND IMPROVED...

ERROR CHECK AND SCRUB FOR SEMICONDUCTOR MEMORY DEVICE

LOOPBACK DATAPATH FOR CLOCK QUALITY DETECTION

WRITE COMMAND TIMING ENHANCEMENT

COMMAND BUS IN MEMORY

INDICATING A BLOCKED REPAIR OPERATION

METHODS FOR ERROR COUNT REPORTING WITH SCALED ERROR COUNT INFORMATI...

BUFFER CONFIGURATIONS FOR COMMUNICATIONS BETWEEN MEMORY DIES AND A...

MEMORY DEVICES WITH MULTIPLE PSEUDO-CHANNELS

MEMORY MODULE MULTIPLE PORT BUFFER TECHNIQUES

Routing Assignments Based on Error Correction Capabilities

MEMORY MAPPING FOR MEMORY, MEMORY MODULES, AND NON-VOLATILE MEMORY

INDIVIDUALLY ADDRESSING MEMORY DEVICES DISCONNECTED FROM A DATA BUS

APPARATUSES, SYSTEMS, AND METHODS FOR IDENTIFYING MULTI-BIT ERRORS

APPARATUSES AND METHODS FOR CONFIGURING I/Os OF MEMORY FOR HYBRID M...

WORD LINE CHARACTERISTICS MONITORS FOR MEMORY DEVICES AND ASSOCIATE...

METHODS FOR PERFORMING MULTIPLE MEMORY OPERATIONS IN RESPONSE TO A...