Matthew B. Baecher

Person

Newburgh, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
System, method and software program for tuneable equalizer adaptati...
- Patent number 9,853,839
- Issue date Dec 26, 2017
- GLOBALFOUNDRIES Inc.
- Troy J. Beukema
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High data rate multilevel clock recovery system
- Patent number 9,762,423
- Issue date Sep 12, 2017
- International Business Machines Corporation
- Matthew B. Baecher
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
High data rate multilevel clock recovery system
- Patent number 9,755,863
- Issue date Sep 5, 2017
- International Business Machines Corporation
- Matthew B. Baecher
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
High data rate multilevel clock recovery system
- Patent number 9,735,988
- Issue date Aug 15, 2017
- International Business Machines Corporation
- Matthew B. Baecher
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
High data rate multilevel clock recovery system
- Patent number 9,712,347
- Issue date Jul 18, 2017
- International Business Machines Corporation
- Matthew B. Baecher
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
High data rate multilevel clock recovery system
- Patent number 9,705,717
- Issue date Jul 11, 2017
- International Business Machines Corporation
- Matthew B. Baecher
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
High data rate multilevel clock recovery system
- Patent number 9,584,345
- Issue date Feb 28, 2017
- International Business Machines Corporation
- Matthew B. Baecher
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Calibration of sampling phase and aperature errors in multi-phase s...
- Patent number 9,369,263
- Issue date Jun 14, 2016
- International Business Machines Corporation
- Matthew B. Baecher
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
On-chip test for integrated AC coupling capacitors
- Patent number 9,335,370
- Issue date May 10, 2016
- GLOBALFOUNDRIES Inc.
- Eugene Atwood
- G01 - MEASURING TESTING
Information Patent Grant
Testing a decision feedback equalizer (‘DFE’)
- Patent number 9,209,948
- Issue date Dec 8, 2015
- International Business Machines Corporation
- Eugene R. Atwood
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Testing a digital-to-analog converter
- Patent number 9,041,572
- Issue date May 26, 2015
- International Business Machines Corporation
- Eugene R. Atwood
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Testing a decision feedback equalizer (‘DFE’)
- Patent number 9,014,254
- Issue date Apr 21, 2015
- International Business Machines Corporation
- Eugene R. Atwood
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method of digitally testing an analog driver circuit
- Patent number 7,659,740
- Issue date Feb 9, 2010
- International Business Machines Corporation
- Joseph O. Marsh
- G01 - MEASURING TESTING
Information Patent Grant
System of digitally testing an analog driver circuit
- Patent number 7,466,156
- Issue date Dec 16, 2008
- International Business Machines Corporation
- Joseph O. Marsh
- G01 - MEASURING TESTING
Information Patent Grant
Low power digital adaptive termination network
- Patent number 7,142,007
- Issue date Nov 28, 2006
- International Business Machines Corporation
- Matthew B. Baecher
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM, METHOD AND SOFTWARE PROGRAM FOR TUNEABLE EQUALIZER ADAPTATI...
- Publication number 20170346662
- Publication date Nov 30, 2017
- GLOBALFOUNDRIES INC.
- Troy J. BEUKEMA
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
HIGH DATA RATE MULTILEVEL CLOCK RECOVERY SYSTEM
- Publication number 20170170996
- Publication date Jun 15, 2017
- International Business Machines Corporation
- Matthew B. Baecher
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
HIGH DATA RATE MULTILEVEL CLOCK RECOVERY SYSTEM
- Publication number 20170170994
- Publication date Jun 15, 2017
- International Business Machines Corporation
- Matthew B. Baecher
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
HIGH DATA RATE MULTILEVEL CLOCK RECOVERY SYSTEM
- Publication number 20170170995
- Publication date Jun 15, 2017
- International Business Machines Corporation
- Matthew B. Baecher
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
HIGH DATA RATE MULTILEVEL CLOCK RECOVERY SYSTEM
- Publication number 20170171005
- Publication date Jun 15, 2017
- International Business Machines Corporation
- Matthew B. Baecher
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
HIGH DATA RATE MULTILEVEL CLOCK RECOVERY SYSTEM
- Publication number 20170171006
- Publication date Jun 15, 2017
- International Business Machines Corporation
- Matthew B. Baecher
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ON-CHIP TEST FOR INTEGRATED AC COUPLING CAPACITORS
- Publication number 20150198647
- Publication date Jul 16, 2015
- International Business Machines Corporation
- Eugene Atwood
- G01 - MEASURING TESTING
Information Patent Application
TESTING A DIGITAL-TO-ANALOG CONVERTER
- Publication number 20150145710
- Publication date May 28, 2015
- International Business Machines Corporation
- EUGENE R. ATWOOD
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TESTING A DECISION FEEDBACK EQUALIZER ('DFE')
- Publication number 20150131707
- Publication date May 14, 2015
- International Business Machines Corporation
- EUGENE R. ATWOOD
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TESTING A DECISION FEEDBACK EQUALIZER ('DFE')
- Publication number 20140376603
- Publication date Dec 25, 2014
- International Business Machines Corporation
- EUGENE R. ATWOOD
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
System And Method of Digitally Testing An Analog Driver Circuit
- Publication number 20090027075
- Publication date Jan 29, 2009
- International Business Machines Corporation
- Joseph O. Marsh
- G01 - MEASURING TESTING
Information Patent Application
System And Method Of Digitally Testing An Analog Driver Circuit
- Publication number 20050246125
- Publication date Nov 3, 2005
- International Business Machines Corporation
- Joseph O. Marsh
- G01 - MEASURING TESTING
Information Patent Application
Low power digital adaptive termination network
- Publication number 20050083079
- Publication date Apr 21, 2005
- Matthew B. Baecher
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Matthew B. Baecher

Person

Patents Grantslast 30 patents

System, method and software program for tuneable equalizer adaptati...

High data rate multilevel clock recovery system

High data rate multilevel clock recovery system

High data rate multilevel clock recovery system

High data rate multilevel clock recovery system

High data rate multilevel clock recovery system

High data rate multilevel clock recovery system

Calibration of sampling phase and aperature errors in multi-phase s...

On-chip test for integrated AC coupling capacitors

Testing a decision feedback equalizer (‘DFE’)

Testing a digital-to-analog converter

Testing a decision feedback equalizer (‘DFE’)

System and method of digitally testing an analog driver circuit

System of digitally testing an analog driver circuit

Low power digital adaptive termination network

Patents Applicationslast 30 patents

SYSTEM, METHOD AND SOFTWARE PROGRAM FOR TUNEABLE EQUALIZER ADAPTATI...

HIGH DATA RATE MULTILEVEL CLOCK RECOVERY SYSTEM

HIGH DATA RATE MULTILEVEL CLOCK RECOVERY SYSTEM

HIGH DATA RATE MULTILEVEL CLOCK RECOVERY SYSTEM

HIGH DATA RATE MULTILEVEL CLOCK RECOVERY SYSTEM

HIGH DATA RATE MULTILEVEL CLOCK RECOVERY SYSTEM

ON-CHIP TEST FOR INTEGRATED AC COUPLING CAPACITORS

TESTING A DIGITAL-TO-ANALOG CONVERTER

TESTING A DECISION FEEDBACK EQUALIZER ('DFE')

TESTING A DECISION FEEDBACK EQUALIZER ('DFE')

System And Method of Digitally Testing An Analog Driver Circuit

System And Method Of Digitally Testing An Analog Driver Circuit

Low power digital adaptive termination network