Matthew B. Leslie

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multiple register clock driver loaded memory subsystem
- Patent number 12,189,996
- Issue date Jan 7, 2025
- Micron Technology, Inc.
- Matthew B. Leslie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for coupling a plurality of semiconductor d...
- Patent number 11,984,428
- Issue date May 14, 2024
- Micron Technology, Inc.
- Matthew B. Leslie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for tuning command/address bus timing and memory devices an...
- Patent number 11,948,661
- Issue date Apr 2, 2024
- Micron Technology, Inc.
- Eric J. Stave
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and systems having ball grid arrays and associated micr...
- Patent number 11,942,404
- Issue date Mar 26, 2024
- Micron Technology, Inc.
- Matthew B. Leslie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory topologies
- Patent number 11,915,791
- Issue date Feb 27, 2024
- Micron Technology, Inc.
- Matthew B. Leslie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device interface and method
- Patent number 11,868,253
- Issue date Jan 9, 2024
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory subsystem register clock driver clock teeing
- Patent number 11,862,294
- Issue date Jan 2, 2024
- Micron Technology, Inc.
- Matthew B. Leslie
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for coupling a plurality of semiconductor d...
- Patent number 11,837,580
- Issue date Dec 5, 2023
- Micron Technology, Inc.
- Matthew B. Leslie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple register clock driver loaded memory subsystem
- Patent number 11,797,229
- Issue date Oct 24, 2023
- Micron Technology, Inc.
- Matthew B. Leslie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configuring multiple register clock drivers of a memory subsystem
- Patent number 11,675,728
- Issue date Jun 13, 2023
- Micron Technology, Inc.
- Matthew B. Leslie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for pulse response smearing of transmitted...
- Patent number 11,626,145
- Issue date Apr 11, 2023
- Micron Technology, Inc.
- Matthew B. Leslie
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for coupling a plurality of semiconductor d...
- Patent number 11,527,508
- Issue date Dec 13, 2022
- Micron Technology, Inc.
- Matthew B. Leslie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory topologies
- Patent number 11,514,961
- Issue date Nov 29, 2022
- Micron Technology, Inc.
- Matthew B. Leslie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory subsystem register clock driver clock teeing
- Patent number 11,468,931
- Issue date Oct 11, 2022
- Micron Technology, Inc.
- Matthew B. Leslie
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device interface and method
- Patent number 11,386,004
- Issue date Jul 12, 2022
- Micron Technology, Inc.
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
APPARATUSES AND METHODS FOR COUPLING A PLURALITY OF SEMICONDUCTOR D...
- Publication number 20240290752
- Publication date Aug 29, 2024
- Micron Technology, Inc.
- Matthew B. Leslie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR TUNING COMMAND/ADDRESS BUS TIMING AND MEMORY DEVICES AN...
- Publication number 20240249758
- Publication date Jul 25, 2024
- Micron Technology, Inc.
- Eric J. Stave
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE INTERFACE AND METHOD
- Publication number 20240111673
- Publication date Apr 4, 2024
- Lodestar Licensing Group, LLC
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE INTERFACE AND METHOD
- Publication number 20240070069
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR COUPLING A PLURALITY OF SEMICONDUCTOR D...
- Publication number 20240063188
- Publication date Feb 22, 2024
- Micron Technology, Inc.
- Matthew B. Leslie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTIPLE REGISTER CLOCK DRIVER LOADED MEMORY SUBSYSTEM
- Publication number 20240045620
- Publication date Feb 8, 2024
- Micron Technology, Inc.
- Matthew B. Leslie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY TOPOLOGIES
- Publication number 20230154512
- Publication date May 18, 2023
- Micron Technology, Inc.
- Matthew B. Leslie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR COUPLING A PLURALITY OF SEMICONDUCTOR D...
- Publication number 20230105886
- Publication date Apr 6, 2023
- Micron Technology, Inc.
- Matthew B. Leslie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY SUBSYSTEM REGISTER CLOCK DRIVER CLOCK TEEING
- Publication number 20230014013
- Publication date Jan 19, 2023
- Micron Technology, Inc.
- Matthew B. Leslie
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE INTERFACE AND METHOD
- Publication number 20220342814
- Publication date Oct 27, 2022
- Micron Technology, Inc.
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY TOPOLOGIES
- Publication number 20220076721
- Publication date Mar 10, 2022
- Micron Technology, Inc.
- Matthew B. Leslie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND SYSTEMS HAVING BALL GRID ARRAYS AND ASSOCIATED MICR...
- Publication number 20220068778
- Publication date Mar 3, 2022
- Micron Technology, Inc.
- Matthew B. Leslie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONFIGURING MULTIPLE REGISTER CLOCK DRIVERS OF A MEMORY SUBSYSTEM
- Publication number 20220004517
- Publication date Jan 6, 2022
- Micron Technology, Inc.
- Matthew B. Leslie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE REGISTER CLOCK DRIVER LOADED MEMORY SUBSYSTEM
- Publication number 20220004317
- Publication date Jan 6, 2022
- Micron Technology, Inc.
- Matthew B. Leslie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SUBSYSTEM REGISTER CLOCK DRIVER CLOCK TEEING
- Publication number 20220005515
- Publication date Jan 6, 2022
- Micron Technology, Inc.
- Matthew B. Leslie
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR PULSE RESPONSE SMEARING OF TRANSMITTED...
- Publication number 20220005512
- Publication date Jan 6, 2022
- Micron Technology, Inc.
- Matthew B. Leslie
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
APPARATUSES AND METHODS FOR COUPLING A PLURALITY OF SEMICONDUCTOR D...
- Publication number 20210391305
- Publication date Dec 16, 2021
- Micron Technology, Inc.
- Matthew B. Leslie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR TUNING COMMAND/ADDRESS BUS TIMING AND MEMORY DEVICES AN...
- Publication number 20210383849
- Publication date Dec 9, 2021
- Micron Technology, Inc.
- Eric J. Stave
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE INTERFACE AND METHOD
- Publication number 20210318956
- Publication date Oct 14, 2021
- Micron Technology, Inc.
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR COUPLING A PLURALITY OF SEMICONDUCTOR D...
- Publication number 20210280557
- Publication date Sep 9, 2021
- Micron Technology, Inc.
- Matthew B. Leslie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY DEVICE INTERFACE AND METHOD
- Publication number 20200272560
- Publication date Aug 27, 2020
- Micron Technology, Inc.
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE INTERFACE AND METHOD
- Publication number 20200272564
- Publication date Aug 27, 2020
- Micron Technology, Inc.
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING

Matthew B. Leslie

Person

Patents Grantslast 30 patents

Multiple register clock driver loaded memory subsystem

Apparatuses and methods for coupling a plurality of semiconductor d...

Methods for tuning command/address bus timing and memory devices an...

Apparatuses and systems having ball grid arrays and associated micr...

Memory topologies

Memory device interface and method

Memory subsystem register clock driver clock teeing

Apparatuses and methods for coupling a plurality of semiconductor d...

Multiple register clock driver loaded memory subsystem

Configuring multiple register clock drivers of a memory subsystem

Apparatuses and methods for pulse response smearing of transmitted...

Apparatuses and methods for coupling a plurality of semiconductor d...

Memory topologies

Memory subsystem register clock driver clock teeing

Memory device interface and method

Patents Applicationslast 30 patents

APPARATUSES AND METHODS FOR COUPLING A PLURALITY OF SEMICONDUCTOR D...

METHODS FOR TUNING COMMAND/ADDRESS BUS TIMING AND MEMORY DEVICES AN...

MEMORY DEVICE INTERFACE AND METHOD

MEMORY DEVICE INTERFACE AND METHOD

APPARATUSES AND METHODS FOR COUPLING A PLURALITY OF SEMICONDUCTOR D...

MULTIPLE REGISTER CLOCK DRIVER LOADED MEMORY SUBSYSTEM

MEMORY TOPOLOGIES

APPARATUSES AND METHODS FOR COUPLING A PLURALITY OF SEMICONDUCTOR D...

MEMORY SUBSYSTEM REGISTER CLOCK DRIVER CLOCK TEEING

MEMORY DEVICE INTERFACE AND METHOD

MEMORY TOPOLOGIES

APPARATUSES AND SYSTEMS HAVING BALL GRID ARRAYS AND ASSOCIATED MICR...

CONFIGURING MULTIPLE REGISTER CLOCK DRIVERS OF A MEMORY SUBSYSTEM

MULTIPLE REGISTER CLOCK DRIVER LOADED MEMORY SUBSYSTEM

MEMORY SUBSYSTEM REGISTER CLOCK DRIVER CLOCK TEEING

APPARATUSES AND METHODS FOR PULSE RESPONSE SMEARING OF TRANSMITTED...

APPARATUSES AND METHODS FOR COUPLING A PLURALITY OF SEMICONDUCTOR D...

METHODS FOR TUNING COMMAND/ADDRESS BUS TIMING AND MEMORY DEVICES AN...

MEMORY DEVICE INTERFACE AND METHOD

APPARATUSES AND METHODS FOR COUPLING A PLURALITY OF SEMICONDUCTOR D...

MEMORY DEVICE INTERFACE AND METHOD

MEMORY DEVICE INTERFACE AND METHOD