Matthew C. Merten

Person

Hillsboro, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Processor including monitoring circuitry for virtual counters
- Patent number 12,189,509
- Issue date Jan 7, 2025
- Wei Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Addition instructions with independent carry chains
- Patent number 11,531,542
- Issue date Dec 20, 2022
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Addition instructions with independent carry chains
- Patent number 11,080,045
- Issue date Aug 3, 2021
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Trace management during aborted speculative operations
- Patent number 11,061,807
- Issue date Jul 13, 2021
- Intel Corporation
- Beeman Strong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtualizing precise event based sampling
- Patent number 11,055,203
- Issue date Jul 6, 2021
- Intel Corporation
- Matthew C. Merten
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for a multi-level reservation station with ins...
- Patent number 10,956,160
- Issue date Mar 23, 2021
- Intel Corporation
- Mark Dechene
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtualizing precise event based sampling
- Patent number 10,496,522
- Issue date Dec 3, 2019
- Intel Corporation
- Matthew C. Merten
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for transactional memory and lock elision incl...
- Patent number 10,409,612
- Issue date Sep 10, 2019
- Intel Corporation
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for transactional memory and lock elision incl...
- Patent number 10,409,611
- Issue date Sep 10, 2019
- Intel Corporation
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tracking mode of a processing device in instruction tracing systems
- Patent number 10,331,452
- Issue date Jun 25, 2019
- Intel Corporation
- Thilo Schmitt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for obtaining a call stack to an event of inte...
- Patent number 10,261,792
- Issue date Apr 16, 2019
- Intel Corporation
- Michael W. Chynoweth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic to test transactional execution status
- Patent number 10,261,879
- Issue date Apr 16, 2019
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic to test transactional execution status
- Patent number 10,248,524
- Issue date Apr 2, 2019
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scheduler implementing dependency matrix having restricted entries
- Patent number 10,235,180
- Issue date Mar 19, 2019
- Intel Corporation
- Srikanth T. Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic to test transactional execution status
- Patent number 10,223,227
- Issue date Mar 5, 2019
- Intel Corporation
- Ravi Rajwar
- G11 - INFORMATION STORAGE
Information Patent Grant
Cooperative triggering
- Patent number 10,216,616
- Issue date Feb 26, 2019
- Intel Corporation
- Beeman C. Strong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic to test transactional execution status
- Patent number 10,210,065
- Issue date Feb 19, 2019
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic to test transactional execution status
- Patent number 10,210,066
- Issue date Feb 19, 2019
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic to test transactional execution status
- Patent number 10,152,401
- Issue date Dec 11, 2018
- Intel Corporation
- Ravi Rajwar
- G11 - INFORMATION STORAGE
Information Patent Grant
Virtualizing precise event based sampling
- Patent number 9,965,375
- Issue date May 8, 2018
- Intel Corporation
- Matthew C. Merten
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for implementing dynamic portbinding within a...
- Patent number 9,904,553
- Issue date Feb 27, 2018
- Intel Corporation
- Bambang Sutanto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Minimizing bandwith to compress output stream in instruction tracin...
- Patent number 9,753,832
- Issue date Sep 5, 2017
- Intel Corporation
- Ilya Wagner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, apparatus, and system for energy efficiency and energy cons...
- Patent number 9,746,903
- Issue date Aug 29, 2017
- Intel Corporation
- Anupama Suryanarayanan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compare and exchange operation using sleep-wakeup mechanism
- Patent number 9,733,937
- Issue date Aug 15, 2017
- Intel Corporation
- Bratin Saha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physical reference list for tracking physical register sharing
- Patent number 9,733,939
- Issue date Aug 15, 2017
- Intel Corporation
- Vijaykumar Balaram Kadgi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic for non-blocking register reclamation
- Patent number 9,652,236
- Issue date May 16, 2017
- Intel Corporation
- Srikanth T. Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Providing status of a processing device with periodic synchronizati...
- Patent number 9,612,938
- Issue date Apr 4, 2017
- Intel Corporation
- Frank Binns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus to prevent voltage droop in a computer
- Patent number 9,606,602
- Issue date Mar 28, 2017
- Intel Corporation
- Anupama Suryanarayanan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for obtaining a call stack to an event of inte...
- Patent number 9,582,275
- Issue date Feb 28, 2017
- Intel Corporation
- Michael W. Chynoweth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware profiling mechanism to enable page level automatic binary...
- Patent number 9,542,191
- Issue date Jan 10, 2017
- Intel Corporation
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PROCESSOR INCLUDING MONITORING CIRCUITRY FOR VIRTUAL COUNTERS
- Publication number 20240012735
- Publication date Jan 11, 2024
- Intel Corporation
- Wei Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROL REGISTER SET TO FACILITATE PROCESSOR EVENT BASED SAMPLING
- Publication number 20230315470
- Publication date Oct 5, 2023
- Intel Corporation
- Matthew Merten
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Performance Monitoring Emulation in Translated Branch Instructions...
- Publication number 20230315501
- Publication date Oct 5, 2023
- Intel Corporation
- Sebastian Winkel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADDITION INSTRUCTIONS WITH INDEPENDENT CARRY CHAINS
- Publication number 20220027154
- Publication date Jan 27, 2022
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADDITION INSTRUCTIONS WITH INDEPENDENT CARRY CHAINS
- Publication number 20210365264
- Publication date Nov 25, 2021
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR A MULTI-LEVEL RESERVATION STATION WITH INS...
- Publication number 20200310801
- Publication date Oct 1, 2020
- Mark Dechene
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUALIZING PRECISE EVENT BASED SAMPLING
- Publication number 20200242003
- Publication date Jul 30, 2020
- Intel Corporation
- Matthew C. Merten
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRACE MANAGEMENT DURING ABORTED SPECULATIVE OPERATIONS
- Publication number 20200210320
- Publication date Jul 2, 2020
- Intel Corporation
- Beeman STRONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC CONFIGURATION OF A DATA FLOW ARRAY FOR PROCESSING DATA FLOW...
- Publication number 20200210172
- Publication date Jul 2, 2020
- Intel Corporation
- Michael ESPIG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COOPERATIVE TRIGGERING
- Publication number 20190188115
- Publication date Jun 20, 2019
- Intel Corporation
- Beeman C. Strong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUALIZING PRECISE EVENT BASED SAMPLING
- Publication number 20180253370
- Publication date Sep 6, 2018
- Intel Corporation
- Matthew C. Merten
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COOPERATIVE TRIGGERING
- Publication number 20180004628
- Publication date Jan 4, 2018
- Intel Corporation
- Beeman C. Strong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUALIZING PRECISE EVENT BASED SAMPLING
- Publication number 20170371769
- Publication date Dec 28, 2017
- Intel Corporation
- Matthew C. Merten
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE PROFILING MECHANISM TO ENABLE PAGE LEVEL AUTOMATIC BINARY...
- Publication number 20170212825
- Publication date Jul 27, 2017
- Intel Corporation
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROVIDING THREAD FAIRNESS IN A HYPER-THREADED MICROPROCESSOR
- Publication number 20170161106
- Publication date Jun 8, 2017
- Intel Corporation
- Morris Marden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method And Apparatus For Obtaining A Call Stack To An Event Of Inte...
- Publication number 20170132004
- Publication date May 11, 2017
- Intel Corporation
- Michael W. Chynoweth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR IMPLEMENTING DYNAMIC PORTBINDING WITHIN A...
- Publication number 20170024213
- Publication date Jan 26, 2017
- Intel Corporation
- Bambang SUTANTO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction and logic to test transactional execution status
- Publication number 20160266992
- Publication date Sep 15, 2016
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, apparatus, and system for speculative abort control mechanisms
- Publication number 20160246606
- Publication date Aug 25, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, APPARATUS, AND SYSTEM FOR SPECULATIVE ABORT CONTROL MECHANISMS
- Publication number 20160239304
- Publication date Aug 18, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, apparatus, and system for speculative abort control mechanisms
- Publication number 20160210177
- Publication date Jul 21, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction And Logic To Test Transactional Execution Status
- Publication number 20160202979
- Publication date Jul 14, 2016
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction and logic to test transactional execution status
- Publication number 20160203019
- Publication date Jul 14, 2016
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction and logic to test transactional execution status
- Publication number 20160203068
- Publication date Jul 14, 2016
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION AND LOGIC TO TEST TRANSACTIONAL EXECUTION STATUS
- Publication number 20160188479
- Publication date Jun 30, 2016
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, apparatus, and system for speculative abort control mechanisms
- Publication number 20160154648
- Publication date Jun 2, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, apparatus, and system for speculative abort control mechanisms
- Publication number 20160132335
- Publication date May 12, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, apparaturs, and system for speculative abort control mechan...
- Publication number 20160132334
- Publication date May 12, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, apparatus, and system for speculative abort control mechanisms
- Publication number 20160132337
- Publication date May 12, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, Apparatus, And System For Speculative Abort Control Mechanisms
- Publication number 20160132333
- Publication date May 12, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING

Matthew C. Merten

Person

Patents Grantslast 30 patents

Processor including monitoring circuitry for virtual counters

Addition instructions with independent carry chains

Addition instructions with independent carry chains

Trace management during aborted speculative operations

Virtualizing precise event based sampling

Method and apparatus for a multi-level reservation station with ins...

Virtualizing precise event based sampling

Apparatus and method for transactional memory and lock elision incl...

Apparatus and method for transactional memory and lock elision incl...

Tracking mode of a processing device in instruction tracing systems

Method and apparatus for obtaining a call stack to an event of inte...

Instruction and logic to test transactional execution status

Instruction and logic to test transactional execution status

Scheduler implementing dependency matrix having restricted entries

Instruction and logic to test transactional execution status

Cooperative triggering

Instruction and logic to test transactional execution status

Instruction and logic to test transactional execution status

Instruction and logic to test transactional execution status

Virtualizing precise event based sampling

Method and apparatus for implementing dynamic portbinding within a...

Minimizing bandwith to compress output stream in instruction tracin...

Method, apparatus, and system for energy efficiency and energy cons...

Compare and exchange operation using sleep-wakeup mechanism

Physical reference list for tracking physical register sharing

Instruction and logic for non-blocking register reclamation

Providing status of a processing device with periodic synchronizati...

Method and apparatus to prevent voltage droop in a computer

Method and apparatus for obtaining a call stack to an event of inte...

Hardware profiling mechanism to enable page level automatic binary...

Patents Applicationslast 30 patents

PROCESSOR INCLUDING MONITORING CIRCUITRY FOR VIRTUAL COUNTERS

CONTROL REGISTER SET TO FACILITATE PROCESSOR EVENT BASED SAMPLING

Performance Monitoring Emulation in Translated Branch Instructions...

ADDITION INSTRUCTIONS WITH INDEPENDENT CARRY CHAINS

ADDITION INSTRUCTIONS WITH INDEPENDENT CARRY CHAINS

METHOD AND APPARATUS FOR A MULTI-LEVEL RESERVATION STATION WITH INS...

VIRTUALIZING PRECISE EVENT BASED SAMPLING

TRACE MANAGEMENT DURING ABORTED SPECULATIVE OPERATIONS

DYNAMIC CONFIGURATION OF A DATA FLOW ARRAY FOR PROCESSING DATA FLOW...

COOPERATIVE TRIGGERING

VIRTUALIZING PRECISE EVENT BASED SAMPLING

COOPERATIVE TRIGGERING

VIRTUALIZING PRECISE EVENT BASED SAMPLING

HARDWARE PROFILING MECHANISM TO ENABLE PAGE LEVEL AUTOMATIC BINARY...

PROVIDING THREAD FAIRNESS IN A HYPER-THREADED MICROPROCESSOR

Method And Apparatus For Obtaining A Call Stack To An Event Of Inte...

METHOD AND APPARATUS FOR IMPLEMENTING DYNAMIC PORTBINDING WITHIN A...

Instruction and logic to test transactional execution status

Method, apparatus, and system for speculative abort control mechanisms

METHOD, APPARATUS, AND SYSTEM FOR SPECULATIVE ABORT CONTROL MECHANISMS

Method, apparatus, and system for speculative abort control mechanisms

Instruction And Logic To Test Transactional Execution Status

Instruction and logic to test transactional execution status

Instruction and logic to test transactional execution status

INSTRUCTION AND LOGIC TO TEST TRANSACTIONAL EXECUTION STATUS

Method, apparatus, and system for speculative abort control mechanisms

Method, apparatus, and system for speculative abort control mechanisms

Method, apparaturs, and system for speculative abort control mechan...

Method, apparatus, and system for speculative abort control mechanisms

Method, Apparatus, And System For Speculative Abort Control Mechanisms