Matthew J. Manusharow

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Phoenix, AZ, US

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Patents Grantslast 30 patents

Information Patent Grant
Electrical interconnect formed through buildup process
- Patent number 10,028,394
- Issue date Jul 17, 2018
- Intel Corporation
- Mihir K. Roy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrical interconnect formed through buildup process
- Patent number 9,955,589
- Issue date Apr 24, 2018
- Intel Corporation
- Mihir K. Roy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
In situ-built pin-grid arrays for coreless substrates, and methods...
- Patent number 8,686,566
- Issue date Apr 1, 2014
- Intel Corporation
- Mihir K. Roy
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
LOW LOSS AND LOW CROSS TALK TRANSMISSION LINES USING SHAPED VIAS
- Publication number 20180288868
- Publication date Oct 4, 2018
- Intel Corporation
- Adel A. ELSHERBINI
- H01 - BASIC ELECTRIC ELEMENTS