Matthew Mattina

Person

Boylston, MA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Hybrid filter banks for artificial neural networks
- Patent number 12,067,373
- Issue date Aug 20, 2024
- ARM Limited
- Dibakar Gope
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Time domain unrolling sparse matrix multiplication system and method
- Patent number 11,928,176
- Issue date Mar 12, 2024
- ARM Limited
- Zhi-Gang Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Refactoring mac operations
- Patent number 11,922,169
- Issue date Mar 5, 2024
- ARM Limited
- Matthew Mattina
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile memory-based compact mixed-signal multiply-accumulate...
- Patent number 11,886,987
- Issue date Jan 30, 2024
- ARM Limited
- Shidhartha Das
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware accelerator for IM2COL operation
- Patent number 11,783,163
- Issue date Oct 10, 2023
- ARM Limited
- Zhi-Gang Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-dimensional data path architecture
- Patent number 11,693,796
- Issue date Jul 4, 2023
- ARM Limited
- Paul Nicholas Whatmough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, method and apparatus for training neural networks using mul...
- Patent number 11,640,533
- Issue date May 2, 2023
- ARM Limited
- Paul Nicholas Whatmough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mixed-precision computation unit
- Patent number 11,561,767
- Issue date Jan 24, 2023
- ARM Limited
- Dibakar Gope
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Artificial neural network optical hardware accelerator
- Patent number 11,526,743
- Issue date Dec 13, 2022
- ARM Limited
- Zhi-Gang Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modulo operation unit
- Patent number 11,507,813
- Issue date Nov 22, 2022
- ARM Limited
- Zhi-Gang Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipelined accumulator
- Patent number 11,501,151
- Issue date Nov 15, 2022
- ARM Limited
- Paul Nicholas Whatmough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor for sparse matrix computation
- Patent number 11,392,376
- Issue date Jul 19, 2022
- ARM Limited
- Zhigang Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for matrix operations
- Patent number 11,379,556
- Issue date Jul 5, 2022
- ARM Limited
- Matthew Mattina
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systolic convolutional neural network
- Patent number 11,188,814
- Issue date Nov 30, 2021
- ARM Limited
- Paul Nicholas Whatmough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache coherency in multiprocessor system
- Patent number 11,151,033
- Issue date Oct 19, 2021
- Tilera Corporation
- David M. Wentzlaff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Matrix multiplication system and method
- Patent number 11,120,101
- Issue date Sep 14, 2021
- ARM Limited
- Zhi-Gang Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance, scalable multi chip interconnect
- Patent number 10,887,238
- Issue date Jan 5, 2021
- Mellanox Technologies, Ltd.
- Carl G. Ramey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, method and apparatus for computationally efficient data man...
- Patent number 10,747,845
- Issue date Aug 18, 2020
- ARM Limited
- Paul Nicholas Whatmough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computing in parallel processing environments
- Patent number 10,606,750
- Issue date Mar 31, 2020
- Mallanox Technologies Ltd.
- Matthew Mattina
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computing in parallel processing environments
- Patent number 10,579,524
- Issue date Mar 3, 2020
- MELLANOX TECHNOLOGIES LTD.
- Matthew Mattina
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computing in parallel processing environments
- Patent number 10,515,045
- Issue date Dec 24, 2019
- MELLANOX TECHNOLOGIES LTD.
- Matthew Mattina
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance, scalable multi chip interconnect
- Patent number 10,367,741
- Issue date Jul 30, 2019
- Mellanox Technologies, Ltd.
- Carl G. Ramey
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Global socket to socket cache coherence architecture
- Patent number 10,339,059
- Issue date Jul 2, 2019
- Mellanoz Technologeis, Ltd.
- Matthew Mattina
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Caching in multicore and multiprocessor architectures
- Patent number 10,073,778
- Issue date Sep 11, 2018
- MELLANOX TECHNOLOGIES LTD.
- Anant Agarwal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-core processor using three dimensional integration
- Patent number 9,886,275
- Issue date Feb 6, 2018
- MELLANOX TECHNOLOGIES LTD.
- Andrew Carlson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing cache memory in a parallel processing environment
- Patent number 9,639,487
- Issue date May 2, 2017
- Mellanox Technologies, Ltd.
- David M Wentzlaff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Caching in multicore and multiprocessor architectures
- Patent number 9,514,050
- Issue date Dec 6, 2016
- Tilera Corporation
- Anant Agarwal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low latency dynamic route selection
- Patent number 9,507,745
- Issue date Nov 29, 2016
- EZ Chip Technologies Ltd.
- Ian Rudolf Bratt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Route prediction in packet switched networks
- Patent number 9,479,431
- Issue date Oct 25, 2016
- Ezchip Technologies Ltd.
- Ian Rudolf Bratt
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
High performance, scalable multi chip interconnect
- Patent number 9,424,228
- Issue date Aug 23, 2016
- Ezchip Technologies Ltd.
- Carl G. Ramey
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
Matrix Multiply Accelerator For Variable Bitwidth Operands
- Publication number 20230108629
- Publication date Apr 6, 2023
- ARM Limited
- Zhi-Gang Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Matrix Multiply Accelerator for Variable Bitwidth Operands
- Publication number 20230103312
- Publication date Apr 6, 2023
- ARM Limited
- Zhi-Gang Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Nibble Block Format
- Publication number 20230076138
- Publication date Mar 9, 2023
- ARM Limited
- Paul Nicholas Whatmough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, DEVICES AND/OR PROCESSES FOR DESIGNING NEURAL NETWORK PROCE...
- Publication number 20230042271
- Publication date Feb 9, 2023
- ARM Limited
- Igor Fedorov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, CIRCUIT, DEVICE AND/OR PROCESSES FOR ACCUMULATING NEURAL NE...
- Publication number 20230026113
- Publication date Jan 26, 2023
- ARM Limited
- Paul Nicholas Whatmough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Dimensional Data Path Architecture
- Publication number 20220382690
- Publication date Dec 1, 2022
- ARM Limited
- Paul Nicholas Whatmough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Refactoring Mac Operations
- Publication number 20220179658
- Publication date Jun 9, 2022
- ARM Limited
- Matthew Mattina
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Activation Compression Method for Deep Learning Acceleration
- Publication number 20220164663
- Publication date May 26, 2022
- ARM Limited
- Zhi-Gang Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Time Domain Unrolling Sparse Matrix Multiplication System and Method
- Publication number 20220035890
- Publication date Feb 3, 2022
- ARM Limited
- Zhi-Gang Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hardware Accelerator For IM2COL Operation
- Publication number 20210390367
- Publication date Dec 16, 2021
- ARM Limited
- Zhi-Gang Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Modulo Operation Unit
- Publication number 20210374509
- Publication date Dec 2, 2021
- ARM Limited
- Zhi-Gang Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Pipelined Accumulator
- Publication number 20210374508
- Publication date Dec 2, 2021
- ARM Limited
- Paul Nicholas Whatmough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Artificial Neural Network Optical Hardware Accelerator
- Publication number 20210287078
- Publication date Sep 16, 2021
- ARM Limited
- Zhi-Gang Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Matrix Multiplication System and Method
- Publication number 20210097130
- Publication date Apr 1, 2021
- ARM Limited
- Zhi-Gang Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hybrid Filter Banks for Artificial Neural Networks
- Publication number 20210089888
- Publication date Mar 25, 2021
- ARM Limited
- Dibakar Gope
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MIXED-PRECISION COMPUTATION UNIT
- Publication number 20210089889
- Publication date Mar 25, 2021
- ARM Limited
- Dibakar Gope
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Refactoring MAC Computations for Reduced Programming Steps
- Publication number 20210064379
- Publication date Mar 4, 2021
- ARM Limited
- Matthew Mattina
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-VOLATILE MEMORY-BASED COMPACT MIXED-SIGNAL MULTIPLY-ACCUMULATE...
- Publication number 20200410333
- Publication date Dec 31, 2020
- ARM Limited
- Shidhartha Das
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR MATRIX OPERATIONS
- Publication number 20200372097
- Publication date Nov 26, 2020
- ARM Limited
- Matthew MATTINA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR SPARSE MATRIX COMPUTATION
- Publication number 20200326938
- Publication date Oct 15, 2020
- Zhigang Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High Performance, Scalable Multi Chip Interconnect
- Publication number 20200177510
- Publication date Jun 4, 2020
- MELLANOX TECHNOLOGIES LTD.
- Carl G. Ramey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, METHOD AND APPARATUS FOR COMPUTATIONALLY EFFICIENT DATA MAN...
- Publication number 20200073911
- Publication date Mar 5, 2020
- ARM Limited
- Paul Nicholas Whatmough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, METHOD AND APPARATUS FOR NEURAL NETWORKS
- Publication number 20200042877
- Publication date Feb 6, 2020
- ARM Limited
- Paul Nicholas WHATMOUGH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTOLIC CONVOLUTIONAL NEURAL NETWORK
- Publication number 20190311243
- Publication date Oct 10, 2019
- ARM Limited
- Paul Nicholas Whatmough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High Performance, Scalable Multi Chip Interconnect
- Publication number 20140122560
- Publication date May 1, 2014
- TILERA CORPORATION
- Carl G. Ramey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for lockstep processing on a fixed-latency int...
- Publication number 20070168712
- Publication date Jul 19, 2007
- Paul B. Racunas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Per-set relaxation of cache inclusion
- Publication number 20070143550
- Publication date Jun 21, 2007
- Intel Corporation
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and an apparatus to reduce network utilization in a multipro...
- Publication number 20060212660
- Publication date Sep 21, 2006
- Matthew C. Mattina
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Predictive early write-back of owned cache blocks in a shared memor...
- Publication number 20060143406
- Publication date Jun 29, 2006
- George Z. Chrysos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for preventing starvation in a slotted-ring ne...
- Publication number 20060045120
- Publication date Mar 2, 2006
- Matthew Mattina
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Matthew Mattina

Person

Patents Grantslast 30 patents

Hybrid filter banks for artificial neural networks

Time domain unrolling sparse matrix multiplication system and method

Refactoring mac operations

Non-volatile memory-based compact mixed-signal multiply-accumulate...

Hardware accelerator for IM2COL operation

Multi-dimensional data path architecture

System, method and apparatus for training neural networks using mul...

Mixed-precision computation unit

Artificial neural network optical hardware accelerator

Modulo operation unit

Pipelined accumulator

Processor for sparse matrix computation

Apparatus and method for matrix operations

Systolic convolutional neural network

Cache coherency in multiprocessor system

Matrix multiplication system and method

High performance, scalable multi chip interconnect

System, method and apparatus for computationally efficient data man...

Computing in parallel processing environments

Computing in parallel processing environments

Computing in parallel processing environments

High performance, scalable multi chip interconnect

Global socket to socket cache coherence architecture

Caching in multicore and multiprocessor architectures

Multi-core processor using three dimensional integration

Managing cache memory in a parallel processing environment

Caching in multicore and multiprocessor architectures

Low latency dynamic route selection

Route prediction in packet switched networks

High performance, scalable multi chip interconnect

Patents Applicationslast 30 patents

Matrix Multiply Accelerator For Variable Bitwidth Operands

Matrix Multiply Accelerator for Variable Bitwidth Operands

Nibble Block Format

SYSTEM, DEVICES AND/OR PROCESSES FOR DESIGNING NEURAL NETWORK PROCE...

SYSTEM, CIRCUIT, DEVICE AND/OR PROCESSES FOR ACCUMULATING NEURAL NE...

Multi-Dimensional Data Path Architecture

Refactoring Mac Operations

Activation Compression Method for Deep Learning Acceleration

Time Domain Unrolling Sparse Matrix Multiplication System and Method

Hardware Accelerator For IM2COL Operation

Modulo Operation Unit

Pipelined Accumulator

Artificial Neural Network Optical Hardware Accelerator

Matrix Multiplication System and Method

Hybrid Filter Banks for Artificial Neural Networks

MIXED-PRECISION COMPUTATION UNIT

Refactoring MAC Computations for Reduced Programming Steps

NON-VOLATILE MEMORY-BASED COMPACT MIXED-SIGNAL MULTIPLY-ACCUMULATE...

APPARATUS AND METHOD FOR MATRIX OPERATIONS

PROCESSOR FOR SPARSE MATRIX COMPUTATION

High Performance, Scalable Multi Chip Interconnect

SYSTEM, METHOD AND APPARATUS FOR COMPUTATIONALLY EFFICIENT DATA MAN...

SYSTEM, METHOD AND APPARATUS FOR NEURAL NETWORKS

SYSTOLIC CONVOLUTIONAL NEURAL NETWORK

High Performance, Scalable Multi Chip Interconnect

Method and apparatus for lockstep processing on a fixed-latency int...

Per-set relaxation of cache inclusion

Method and an apparatus to reduce network utilization in a multipro...

Predictive early write-back of owned cache blocks in a shared memor...

Method and apparatus for preventing starvation in a slotted-ring ne...