Matthias Hierlemann

Person

Hopewell Junction, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Silicon-on-insulator chip having multiple crystal orientations
- Patent number 10,217,812
- Issue date Feb 26, 2019
- Infineon Technologies AG
- Armin Tilke
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Tunable stressed polycrystalline silicon on dielectrics in an integ...
- Patent number 9,105,747
- Issue date Aug 11, 2015
- Infineon Technologies AG
- Matthias Hierlemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Buried gate transistor
- Patent number 9,059,141
- Issue date Jun 16, 2015
- Infineon Technologies AG
- Richard Lindsay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Buried gate transistor
- Patent number 8,796,762
- Issue date Aug 5, 2014
- Infineon Technologies AG
- Richard Lindsay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Buried gate transistor
- Patent number 8,338,887
- Issue date Dec 25, 2012
- Infineon Technologies AG
- Richard Lindsay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Silicon-on-insulator chip having multiple crystal orientations
- Patent number 8,319,285
- Issue date Nov 27, 2012
- Infineon Technologies AG
- Armin Tilke
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Capacitors and methods of manufacture thereof
- Patent number 8,101,985
- Issue date Jan 24, 2012
- Infineon Technologies AG
- Matthias Hierlemann
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method and apparatus for manufacturing a semiconductor
- Patent number 8,016,941
- Issue date Sep 13, 2011
- Infineon Technologies AG
- Matthias Hierlemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Tunable stressed polycrystalline silicon on dielectrics in an integ...
- Patent number 7,863,130
- Issue date Jan 4, 2011
- Infineon Technologies AG
- Matthias Hierlemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Capacitors and methods of manufacture thereof
- Patent number 7,851,302
- Issue date Dec 14, 2010
- Infineon Technologies AG
- Matthias Hierlemann
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Piezoelectric stress liner for bulk and SOI
- Patent number 7,586,158
- Issue date Sep 8, 2009
- Infineon Technologies AG
- Matthias Hierlemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of manufacturing semiconductor devices with rotated substrates
- Patent number 7,449,374
- Issue date Nov 11, 2008
- Infineon Technologies AG
- Matthias Hierlemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Implantation process in semiconductor fabrication
- Patent number 7,358,167
- Issue date Apr 15, 2008
- Infineon Technologies AG
- Matthias Hierlemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Field-effect transistor structure and associated semiconductor memo...
- Patent number 7,250,650
- Issue date Jul 31, 2007
- Infineon Technologies AG
- Matthias Hierlemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor devices with rotated substrates and methods of manufa...
- Patent number 7,205,639
- Issue date Apr 17, 2007
- Infineon Technologies AG
- Matthias Hierlemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Implantation process in semiconductor fabrication
- Patent number 7,172,954
- Issue date Feb 6, 2007
- Infineon Technologies AG
- Matthias Hierlemann
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SILICON-ON-INSULATOR CHIP HAVING MULTIPLE CRYSTAL ORIENTATIONS
- Publication number 20130082350
- Publication date Apr 4, 2013
- Armin Tilke
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Buried Gate Transistor
- Publication number 20130059424
- Publication date Mar 7, 2013
- INFINEON TECHNOLOGIES AG
- Richard Lindsay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Buried Gate Transistor
- Publication number 20130049090
- Publication date Feb 28, 2013
- INFINEON TECHNOLOGIES AG
- Richard Lindsay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Tunable Stressed Polycrystalline Silicon on Dielectrics in an Integ...
- Publication number 20110089501
- Publication date Apr 21, 2011
- Matthias Hierlemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Capacitors and Methods of Manufacture Thereof
- Publication number 20110037146
- Publication date Feb 17, 2011
- Matthias Hierlemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Tunable stressed polycrystalline silicon on dielectrics in an integ...
- Publication number 20080283927
- Publication date Nov 20, 2008
- Matthias Hierlemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and Apparatus For Manufacturing A Semiconductor
- Publication number 20080188046
- Publication date Aug 7, 2008
- Infineon Technologies North America Corp.
- Matthias Hierlemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of manufacturing semiconductor devices with rotated substrates
- Publication number 20070173003
- Publication date Jul 26, 2007
- Matthias Hierlemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Silicon-on-insulator chip having multiple crystal orientations
- Publication number 20070145481
- Publication date Jun 28, 2007
- Armin Tilke
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Implantation process in semiconductor fabrication
- Publication number 20070059907
- Publication date Mar 15, 2007
- Matthias Hierlemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Piezoelectric stress liner for bulk and SOI
- Publication number 20070018328
- Publication date Jan 25, 2007
- Matthias Hierlemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor device with a buried gate and method of forming the same
- Publication number 20070007571
- Publication date Jan 11, 2007
- Richard Lindsay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Implantation process in semiconductor fabrication
- Publication number 20060252239
- Publication date Nov 9, 2006
- Matthias Hierlemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor devices with rotated substrates and methods of manufa...
- Publication number 20060202277
- Publication date Sep 14, 2006
- Matthias Hierlemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Capacitors and methods of manufacture thereof
- Publication number 20060177981
- Publication date Aug 10, 2006
- Matthias Hierlemann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Field-effect transistor structure, associated semiconductor memory...
- Publication number 20050218446
- Publication date Oct 6, 2005
- Infineon Technologies AG
- Matthias Hierlemann
- H01 - BASIC ELECTRIC ELEMENTS

Matthias Hierlemann

Person

Patents Grantslast 30 patents

Silicon-on-insulator chip having multiple crystal orientations

Tunable stressed polycrystalline silicon on dielectrics in an integ...

Buried gate transistor

Buried gate transistor

Buried gate transistor

Silicon-on-insulator chip having multiple crystal orientations

Capacitors and methods of manufacture thereof

Method and apparatus for manufacturing a semiconductor

Tunable stressed polycrystalline silicon on dielectrics in an integ...

Capacitors and methods of manufacture thereof

Piezoelectric stress liner for bulk and SOI

Methods of manufacturing semiconductor devices with rotated substrates

Implantation process in semiconductor fabrication

Field-effect transistor structure and associated semiconductor memo...

Semiconductor devices with rotated substrates and methods of manufa...

Implantation process in semiconductor fabrication

Patents Applicationslast 30 patents

SILICON-ON-INSULATOR CHIP HAVING MULTIPLE CRYSTAL ORIENTATIONS

Buried Gate Transistor

Buried Gate Transistor

Tunable Stressed Polycrystalline Silicon on Dielectrics in an Integ...

Capacitors and Methods of Manufacture Thereof

Tunable stressed polycrystalline silicon on dielectrics in an integ...

Method and Apparatus For Manufacturing A Semiconductor

Methods of manufacturing semiconductor devices with rotated substrates

Silicon-on-insulator chip having multiple crystal orientations

Implantation process in semiconductor fabrication

Piezoelectric stress liner for bulk and SOI

Semiconductor device with a buried gate and method of forming the same

Implantation process in semiconductor fabrication

Semiconductor devices with rotated substrates and methods of manufa...

Capacitors and methods of manufacture thereof

Field-effect transistor structure, associated semiconductor memory...