Mattia Robustelli

Person

Milan, IT

People

Patents Grantslast 30 patents

Information Patent Grant
Write latency and energy using asymmetric cell design
- Patent number 12,125,540
- Issue date Oct 22, 2024
- Micron Technology, Inc.
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for programming multi-level self-selecting memory cell
- Patent number 12,073,881
- Issue date Aug 27, 2024
- Micron Technology, Inc.
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for multi-level chalcogenide memory cell programming
- Patent number 12,033,695
- Issue date Jul 9, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Programming techniques for polarity-based memory cells
- Patent number 12,014,779
- Issue date Jun 18, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Reading a multi-level memory cell
- Patent number 11,996,141
- Issue date May 28, 2024
- Micron Technology, Inc.
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive write operations for a memory device
- Patent number 11,942,183
- Issue date Mar 26, 2024
- Micron Technology, Inc.
- Mattia Boniardi
- G11 - INFORMATION STORAGE
Information Patent Grant
Cross-point pillar architecture for memory arrays
- Patent number 11,887,661
- Issue date Jan 30, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Implementations to store fuse data in memory devices
- Patent number 11,837,267
- Issue date Dec 5, 2023
- Micron Technology, Inc.
- Mattia Boniardi
- G11 - INFORMATION STORAGE
Information Patent Grant
Dopant-modulated etching for memory devices
- Patent number 11,800,816
- Issue date Oct 24, 2023
- Micron Technology, Inc.
- Innocenzo Tortorelli
Information Patent Grant
Programming memory cells using asymmetric current pulses
- Patent number 11,705,199
- Issue date Jul 18, 2023
- Micron Technology, Inc.
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Programming techniques for polarity-based memory cells
- Patent number 11,423,988
- Issue date Aug 23, 2022
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for programming multi-level self-selecting memory cell
- Patent number 11,335,403
- Issue date May 17, 2022
- Micron Technology, Inc.
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Reading a multi-level memory cell
- Patent number 11,302,390
- Issue date Apr 12, 2022
- Micron Technology, Inc.
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Programming memory cells using asymmetric current pulses
- Patent number 11,217,308
- Issue date Jan 4, 2022
- Micron Technology
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive write operations for a memory device
- Patent number 11,158,358
- Issue date Oct 26, 2021
- Micron Technology, Inc.
- Mattia Boniardi
- G11 - INFORMATION STORAGE
Information Patent Grant
Dedicated read voltages for data structures
- Patent number 11,114,159
- Issue date Sep 7, 2021
- Micron Technology, Inc.
- Marco Sforzin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implementations to store fuse data in memory devices
- Patent number 11,037,613
- Issue date Jun 15, 2021
- Micron Technology, Inc.
- Mattia Boniardi
- G11 - INFORMATION STORAGE
Information Patent Grant
Dopant-modulated etching for memory devices
- Patent number 10,854,813
- Issue date Dec 1, 2020
- Micron Technology, Inc.
- Innocenzo Tortorelli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Techniques for programming multi-level self-selecting memory cell
- Patent number 10,755,781
- Issue date Aug 25, 2020
- Micron Technology, Inc.
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Dedicated read voltages for data structures
- Patent number 10,658,034
- Issue date May 19, 2020
- Micron Technology, Inc.
- Marco Sforzin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Phase change memory devices and systems having reduced voltage thre...
- Patent number 10,043,576
- Issue date Aug 7, 2018
- Intel Corporation
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Phase change memory devices and systems having reduced voltage thre...
- Patent number 9,627,055
- Issue date Apr 18, 2017
- Intel Corporation
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Phase change memory devices and systems having reduced voltage thre...
- Patent number 9,583,185
- Issue date Feb 28, 2017
- Intel Corporation
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device and method of operating the same
- Patent number 9,349,481
- Issue date May 24, 2016
- SK Hynix Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Grant
Reading memory cell history during program operation for adaptive p...
- Patent number 9,111,631
- Issue date Aug 18, 2015
- Micron Technology, Inc.
- Angelo Visconti
- G11 - INFORMATION STORAGE
Information Patent Grant
Reading memory cell history during program operation for adaptive p...
- Patent number 8,773,907
- Issue date Jul 8, 2014
- Micron Technology, Inc.
- Angelo Visconti
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device and method of operating the same
- Patent number 8,705,287
- Issue date Apr 22, 2014
- SK Hynix Inc.
- Seiichi Aritome
- G11 - INFORMATION STORAGE
Information Patent Grant
Reading memory cell history during program operation for adaptive p...
- Patent number 8,451,662
- Issue date May 28, 2013
- Micron Technology, Inc.
- Angelo Visconti
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic polarization for reducing stress induced leakage current
- Patent number 8,274,832
- Issue date Sep 25, 2012
- Micron Technology, Inc.
- Luca Chiavarone
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic polarization for reducing stress induced leakage current
- Patent number 7,940,568
- Issue date May 10, 2011
- Micron Technology, Inc.
- Luca Chiavarone
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
REFERENCING MEMORY USING PORTIONS OF A SPLIT LOGICAL BLOCK ADDRESS
- Publication number 20240427699
- Publication date Dec 26, 2024
- Micron Technology, Inc.
- Mattia Robustelli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR MULTI-LEVEL MEMORY CELL PROGRAMMING
- Publication number 20240404590
- Publication date Dec 5, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAMMING TECHNIQUES FOR POLARITY-BASED MEMORY CELLS
- Publication number 20240386963
- Publication date Nov 21, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Application
READING A MULTI-LEVEL MEMORY CELL
- Publication number 20240321347
- Publication date Sep 26, 2024
- Micron Technology, Inc.
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS WITH MULTI-BIT CELL READ MECHANISM AND METHODS FOR OPERAT...
- Publication number 20240233828
- Publication date Jul 11, 2024
- Micron Technology, Inc.
- Matteo Impala'
- G11 - INFORMATION STORAGE
Information Patent Application
CROSS-POINT PILLAR ARCHITECTURE FOR MEMORY ARRAYS
- Publication number 20240221829
- Publication date Jul 4, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Application
ADAPTIVE WRITE OPERATIONS FOR A MEMORY DEVICE
- Publication number 20240203468
- Publication date Jun 20, 2024
- Micron Technology, Inc.
- Mattia Boniardi
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS WITH MULTI-BIT CELL READ MECHANISM AND METHODS FOR OPERAT...
- Publication number 20240135996
- Publication date Apr 25, 2024
- Micron Technology, Inc.
- Matteo Impala'
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY AND STORAGE ON A SINGLE CHIP
- Publication number 20240130143
- Publication date Apr 18, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DOPANT-MODULATED ETCHING FOR MEMORY DEVICES
- Publication number 20240049610
- Publication date Feb 8, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
Information Patent Application
UNIPOLAR PROGRAMMING OF MEMORY CELLS
- Publication number 20240029796
- Publication date Jan 25, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Application
WORDLINE BOOST BY CHARGE SHARING IN A MEMORY DEVICE
- Publication number 20230386572
- Publication date Nov 30, 2023
- Micron Technology, Inc.
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR MULTI-LEVEL MEMORY CELL PROGRAMMING
- Publication number 20230360699
- Publication date Nov 9, 2023
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Application
ASYMMETRIC MEMORY CELL DESIGN
- Publication number 20230354619
- Publication date Nov 2, 2023
- Micron Technology, Inc.
- Mattia Robustelli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WRITE LATENCY AND ENERGY USING ASYMMETRIC CELL DESIGN
- Publication number 20230352095
- Publication date Nov 2, 2023
- Micron Technology, Inc.
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Application
CROSS-POINT PILLAR ARCHITECTURE FOR MEMORY ARRAYS
- Publication number 20230207002
- Publication date Jun 29, 2023
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAMMING TECHNIQUES FOR POLARITY-BASED MEMORY CELLS
- Publication number 20230034787
- Publication date Feb 2, 2023
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Application
READING A MULTI-LEVEL MEMORY CELL
- Publication number 20220301619
- Publication date Sep 22, 2022
- Micron Technology, Inc.
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR PROGRAMMING MULTI-LEVEL SELF-SELECTING MEMORY CELL
- Publication number 20220262437
- Publication date Aug 18, 2022
- Micron Technology, Inc.
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAMMING MEMORY CELLS USING ASYMMETRIC CURRENT PULSES
- Publication number 20220122664
- Publication date Apr 21, 2022
- Micron Technology, Inc.
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Application
ADAPTIVE WRITE OPERATIONS FOR A MEMORY DEVICE
- Publication number 20220108732
- Publication date Apr 7, 2022
- Micron Technology, Inc.
- Mattia Boniardi
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAMMING TECHNIQUES FOR POLARITY-BASED MEMORY CELLS
- Publication number 20220068391
- Publication date Mar 3, 2022
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Application
READING A MULTI-LEVEL MEMORY CELL
- Publication number 20220013167
- Publication date Jan 13, 2022
- Micron Technology, Inc.
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Application
IMPLEMENTATIONS TO STORE FUSE DATA IN MEMORY DEVICES
- Publication number 20210272615
- Publication date Sep 2, 2021
- Micron Technology, Inc.
- Mattia Boniardi
- G11 - INFORMATION STORAGE
Information Patent Application
DOPANT-MODULATED ETCHING FOR MEMORY DEVICES
- Publication number 20210043838
- Publication date Feb 11, 2021
- Micron Technology, Inc.
- Innocenzo Tortorelli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ADAPTIVE WRITE OPERATIONS FOR A MEMORY DEVICE
- Publication number 20210027813
- Publication date Jan 28, 2021
- Micron Technology, Inc.
- Mattia Boniardi
- G11 - INFORMATION STORAGE
Information Patent Application
IMPLEMENTATIONS TO STORE FUSE DATA IN MEMORY DEVICES
- Publication number 20210020218
- Publication date Jan 21, 2021
- Micron Technology, Inc.
- Mattia Boniardi
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR PROGRAMMING MULTI-LEVEL SELF-SELECTING MEMORY CELL
- Publication number 20210020243
- Publication date Jan 21, 2021
- Micron Technology, Inc.
- Mattia Robustelli
- G11 - INFORMATION STORAGE
Information Patent Application
DEDICATED READ VOLTAGES FOR DATA STRUCTURES
- Publication number 20200279604
- Publication date Sep 3, 2020
- Micron Technology, Inc.
- Marco Sforzin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEDICATED READ VOLTAGES FOR DATA STRUCTURES
- Publication number 20200143880
- Publication date May 7, 2020
- Micron Technology, Inc.
- Marco Sforzin
- G06 - COMPUTING CALCULATING COUNTING

Mattia Robustelli

Person

Patents Grantslast 30 patents

Write latency and energy using asymmetric cell design

Techniques for programming multi-level self-selecting memory cell

Techniques for multi-level chalcogenide memory cell programming

Programming techniques for polarity-based memory cells

Reading a multi-level memory cell

Adaptive write operations for a memory device

Cross-point pillar architecture for memory arrays

Implementations to store fuse data in memory devices

Dopant-modulated etching for memory devices

Programming memory cells using asymmetric current pulses

Programming techniques for polarity-based memory cells

Techniques for programming multi-level self-selecting memory cell

Reading a multi-level memory cell

Programming memory cells using asymmetric current pulses

Adaptive write operations for a memory device

Dedicated read voltages for data structures

Implementations to store fuse data in memory devices

Dopant-modulated etching for memory devices

Techniques for programming multi-level self-selecting memory cell

Dedicated read voltages for data structures

Phase change memory devices and systems having reduced voltage thre...

Phase change memory devices and systems having reduced voltage thre...

Phase change memory devices and systems having reduced voltage thre...

Semiconductor memory device and method of operating the same

Reading memory cell history during program operation for adaptive p...

Reading memory cell history during program operation for adaptive p...

Semiconductor memory device and method of operating the same

Reading memory cell history during program operation for adaptive p...

Dynamic polarization for reducing stress induced leakage current

Dynamic polarization for reducing stress induced leakage current

Patents Applicationslast 30 patents

REFERENCING MEMORY USING PORTIONS OF A SPLIT LOGICAL BLOCK ADDRESS

TECHNIQUES FOR MULTI-LEVEL MEMORY CELL PROGRAMMING

PROGRAMMING TECHNIQUES FOR POLARITY-BASED MEMORY CELLS

READING A MULTI-LEVEL MEMORY CELL

APPARATUS WITH MULTI-BIT CELL READ MECHANISM AND METHODS FOR OPERAT...

CROSS-POINT PILLAR ARCHITECTURE FOR MEMORY ARRAYS

ADAPTIVE WRITE OPERATIONS FOR A MEMORY DEVICE

APPARATUS WITH MULTI-BIT CELL READ MECHANISM AND METHODS FOR OPERAT...

MEMORY AND STORAGE ON A SINGLE CHIP

DOPANT-MODULATED ETCHING FOR MEMORY DEVICES

UNIPOLAR PROGRAMMING OF MEMORY CELLS

WORDLINE BOOST BY CHARGE SHARING IN A MEMORY DEVICE

TECHNIQUES FOR MULTI-LEVEL MEMORY CELL PROGRAMMING

ASYMMETRIC MEMORY CELL DESIGN

WRITE LATENCY AND ENERGY USING ASYMMETRIC CELL DESIGN

CROSS-POINT PILLAR ARCHITECTURE FOR MEMORY ARRAYS

PROGRAMMING TECHNIQUES FOR POLARITY-BASED MEMORY CELLS

READING A MULTI-LEVEL MEMORY CELL

TECHNIQUES FOR PROGRAMMING MULTI-LEVEL SELF-SELECTING MEMORY CELL

PROGRAMMING MEMORY CELLS USING ASYMMETRIC CURRENT PULSES

ADAPTIVE WRITE OPERATIONS FOR A MEMORY DEVICE

PROGRAMMING TECHNIQUES FOR POLARITY-BASED MEMORY CELLS

READING A MULTI-LEVEL MEMORY CELL

IMPLEMENTATIONS TO STORE FUSE DATA IN MEMORY DEVICES

DOPANT-MODULATED ETCHING FOR MEMORY DEVICES

ADAPTIVE WRITE OPERATIONS FOR A MEMORY DEVICE

IMPLEMENTATIONS TO STORE FUSE DATA IN MEMORY DEVICES

TECHNIQUES FOR PROGRAMMING MULTI-LEVEL SELF-SELECTING MEMORY CELL

DEDICATED READ VOLTAGES FOR DATA STRUCTURES

DEDICATED READ VOLTAGES FOR DATA STRUCTURES