Meir OVADIA

Person

Rosh Ha-Ayin, IL

People

Patents Grantslast 30 patents

Information Patent Grant
Method and system for generating a validation test
- Patent number 10,733,345
- Issue date Aug 4, 2020
- Cadence Design Systems, Inc.
- Meir Ovadia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for generating a validation test
- Patent number 10,698,802
- Issue date Jun 30, 2020
- Cadence Design Systems, Inc.
- Meir Ovadia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for profiling performance of a system on chip
- Patent number 10,698,805
- Issue date Jun 30, 2020
- Cadence Design Systems, Inc.
- Meir Ovadia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for processing verification tests for testing a d...
- Patent number 10,592,703
- Issue date Mar 17, 2020
- Cadence Design Systems, Inc.
- Meir Ovadia
- G01 - MEASURING TESTING
Information Patent Grant
Method and system for reconstructing a graph presentation of a prev...
- Patent number 10,579,761
- Issue date Mar 3, 2020
- Cadence Design Systems, Inc.
- Meir Ovadia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for automated selection of a subset of plurality...
- Patent number 10,528,691
- Issue date Jan 7, 2020
- Cadence Design Systems, Inc.
- Meir Ovadia
- G01 - MEASURING TESTING
Information Patent Grant
Method and system for generating validation tests
- Patent number 10,503,854
- Issue date Dec 10, 2019
- Cadence Design Systems, Inc.
- Meir Ovadia
- G01 - MEASURING TESTING
Information Patent Grant
Method and system for generating validation tests
- Patent number 10,295,596
- Issue date May 21, 2019
- Cadence Design Systems, Inc.
- Meir Ovadia
- G01 - MEASURING TESTING
Information Patent Grant
System and method for performing out of order name resolution in an...
- Patent number 10,162,920
- Issue date Dec 25, 2018
- Cadence Design Systems, Inc.
- Jonathan Lee DeKock
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for generating post-silicon validation tests
- Patent number 9,858,371
- Issue date Jan 2, 2018
- Cadence Design Systems, Inc.
- Meir Ovadia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for automated debugging memory allocation and mem...
- Patent number 9,852,046
- Issue date Dec 26, 2017
- Cadence Design Systems, Inc.
- Rodion Melnikov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for generating post-silicon validation tests
- Patent number 9,823,305
- Issue date Nov 21, 2017
- Cadence Design Systems, Inc.
- Meir Ovadia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for debugging a system on chip under test
- Patent number 9,792,402
- Issue date Oct 17, 2017
- Cadence Design Systems, Inc.
- Meir Ovadia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for automatically generating executable system-le...
- Patent number 9,690,681
- Issue date Jun 27, 2017
- Cadence Design Systems, Inc.
- Meir Ovadia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods, systems, and articles of manufacture for using multiple mo...
- Patent number 9,367,423
- Issue date Jun 14, 2016
- Cadence Design Systems, Inc.
- Meir Ovadia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for debugging of compiled code using an interpreter
- Patent number 8,997,049
- Issue date Mar 31, 2015
- Cadence Design Systems, Inc.
- Rodion Melnikov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for test reduction and analysis
- Patent number 8,719,771
- Issue date May 6, 2014
- Cadence Design Systems, Inc.
- Meir Ovadia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, method, and computer program product for abstract software...
- Patent number 8,656,368
- Issue date Feb 18, 2014
- Cadence Design Systems, Inc.
- Meir Ovadia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automation of software verification
- Patent number 8,156,474
- Issue date Apr 10, 2012
- Cadence Design Systems, Inc.
- Marat Teplitsky
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND SYSTEM FOR DEBUGGING A PROGRAM
- Publication number 20140282415
- Publication date Sep 18, 2014
- Cadence Design Systems, Inc.
- Meir OVADIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR TEST REDUCTION AND ANALYSIS
- Publication number 20110078651
- Publication date Mar 31, 2011
- Cadence Design Systems, Inc.
- Meir OVADIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTOMATION OF SOFTWARE VERIFICATION
- Publication number 20090172649
- Publication date Jul 2, 2009
- Cadence Design System, Inc.
- Marat Teplitsky
- G06 - COMPUTING CALCULATING COUNTING

Meir OVADIA

Person

Patents Grantslast 30 patents

Method and system for generating a validation test

Method and system for generating a validation test

Method and system for profiling performance of a system on chip

Method and system for processing verification tests for testing a d...

Method and system for reconstructing a graph presentation of a prev...

Method and system for automated selection of a subset of plurality...

Method and system for generating validation tests

Method and system for generating validation tests

System and method for performing out of order name resolution in an...

Method and system for generating post-silicon validation tests

Method and system for automated debugging memory allocation and mem...

Method and system for generating post-silicon validation tests

Method and system for debugging a system on chip under test

Method and system for automatically generating executable system-le...

Methods, systems, and articles of manufacture for using multiple mo...

Method and system for debugging of compiled code using an interpreter

Method and system for test reduction and analysis

System, method, and computer program product for abstract software...

Automation of software verification

Patents Applicationslast 30 patents

METHOD AND SYSTEM FOR DEBUGGING A PROGRAM

METHOD AND SYSTEM FOR TEST REDUCTION AND ANALYSIS

AUTOMATION OF SOFTWARE VERIFICATION