Michael A. Sokol

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for reducing clock speed and power consumption
- Patent number 7,656,907
- Issue date Feb 2, 2010
- Broadcom Corporation
- Michael Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus of inter-chip bus shared by message passing an...
- Patent number 7,420,977
- Issue date Sep 2, 2008
- Broadcom Corporation
- Jason Fan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for reducing clock speed and power consumption
- Patent number 7,274,705
- Issue date Sep 25, 2007
- Broadcom Corporation
- Michael Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for displaying system state information
- Patent number 7,154,407
- Issue date Dec 26, 2006
- Broadcom Corporation
- Michael Sokol
- G05 - CONTROLLING REGULATING
Information Patent Grant
Switch having virtual shared memory
- Patent number 7,120,155
- Issue date Oct 10, 2006
- Broadcom Corporation
- Michael Sokol
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Switch memory management using a linked list structure
- Patent number 6,988,177
- Issue date Jan 17, 2006
- Broadcom Corporation
- Michael A. Sokol
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Apparatus and method for displaying system state information
- Patent number 6,963,288
- Issue date Nov 8, 2005
- Broadcom Corporation
- Michael Sokol
- G05 - CONTROLLING REGULATING

Patents Applicationslast 30 patents

Information Patent Application
Method and apparatus for reducing clock speed and power consumption
- Publication number 20070286223
- Publication date Dec 13, 2007
- Broadcom Corporation
- Michael Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Switch memory management using a linked list structure
- Publication number 20050235129
- Publication date Oct 20, 2005
- Broadcom Corporation
- Michael A. Sokol
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Apparatus and method for displaying system state information
- Publication number 20050024225
- Publication date Feb 3, 2005
- Michael Sokol
- G05 - CONTROLLING REGULATING
Information Patent Application
Switch having virtual shared memory
- Publication number 20020181450
- Publication date Dec 5, 2002
- Altima Communications, Inc.
- Michael Sokol
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus of inter-chip bus shared by message passing an...
- Publication number 20020069301
- Publication date Jun 6, 2002
- Altima Communications, Inc.
- Jason Fan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Switch memory management using a linked list structure
- Publication number 20020042787
- Publication date Apr 11, 2002
- Broadcom Corporation
- Michael A. Sokol
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus for reducing clock speed and power consumption
- Publication number 20020041599
- Publication date Apr 11, 2002
- Altima Communications Inc.
- Michael Chang
- G06 - COMPUTING CALCULATING COUNTING

Michael A. Sokol

Person

Patents Grantslast 30 patents

Method and apparatus for reducing clock speed and power consumption

Method and apparatus of inter-chip bus shared by message passing an...

Method and apparatus for reducing clock speed and power consumption

Apparatus and method for displaying system state information

Switch having virtual shared memory

Switch memory management using a linked list structure

Apparatus and method for displaying system state information

Patents Applicationslast 30 patents

Method and apparatus for reducing clock speed and power consumption

Switch memory management using a linked list structure

Apparatus and method for displaying system state information

Switch having virtual shared memory

Method and apparatus of inter-chip bus shared by message passing an...

Switch memory management using a linked list structure

Method and apparatus for reducing clock speed and power consumption