Michael B. Kugel

Person

Boeblingen, DE

People

Patents Grantslast 30 patents

Information Patent Grant
True complement dynamic circuit and method for combining binary data
- Patent number 11,881,853
- Issue date Jan 23, 2024
- International Business Machines Corporation
- Michael Berthold Kugel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital logic circuit for deterring race violations at an array tes...
- Patent number 11,043,938
- Issue date Jun 22, 2021
- International Business Machines Corporation
- Harry Barowski
- G01 - MEASURING TESTING
Information Patent Grant
Digital logic circuit for deterring race violations at an array tes...
- Patent number 10,587,248
- Issue date Mar 10, 2020
- International Business Machines Corporation
- Harry Barowski
- G11 - INFORMATION STORAGE
Information Patent Grant
Current-mode sense amplifier
- Patent number 10,529,388
- Issue date Jan 7, 2020
- International Business Machines Corporation
- Alexander Fritsch
- G11 - INFORMATION STORAGE
Information Patent Grant
Digital logic circuit for deterring race violations at an array tes...
- Patent number 10,367,481
- Issue date Jul 30, 2019
- International Business Machines Corporation
- Harry Barowski
- G01 - MEASURING TESTING
Information Patent Grant
Current-mode sense amplifier
- Patent number 10,096,346
- Issue date Oct 9, 2018
- International Business Machines Corporation
- Alexander Fritsch
- G11 - INFORMATION STORAGE
Information Patent Grant
Current-mode sense amplifier and reference current circuitry
- Patent number 9,767,872
- Issue date Sep 19, 2017
- International Business Machines Corporation
- Alexander Fritsch
- G11 - INFORMATION STORAGE
Information Patent Grant
Current-mode sense amplifier
- Patent number 9,761,286
- Issue date Sep 12, 2017
- International Business Machines Corporation
- Alexander Fritsch
- G11 - INFORMATION STORAGE
Information Patent Grant
Stressing and testing semiconductor memory cells
- Patent number 9,704,567
- Issue date Jul 11, 2017
- International Business Machines Corporation
- Michael B. Kugel
- G11 - INFORMATION STORAGE
Information Patent Grant
RAM at speed flexible timing and setup control
- Patent number 9,627,090
- Issue date Apr 18, 2017
- International Business Machines Corporation
- Martin Eckert
- G11 - INFORMATION STORAGE
Information Patent Grant
RAM at speed flexible timing and setup control
- Patent number 9,627,017
- Issue date Apr 18, 2017
- International Business Machines Corporation
- Martin Eckert
- G11 - INFORMATION STORAGE
Information Patent Grant
Current-mode sense amplifier
- Patent number 9,595,304
- Issue date Mar 14, 2017
- International Business Machines Corporation
- Alexander Fritsch
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Single ended bitline current sense amplifier for SRAM applications
- Patent number 9,589,604
- Issue date Mar 7, 2017
- International Business Machines Corporation
- Alexander Fritsch
- G11 - INFORMATION STORAGE
Information Patent Grant
Current-mode sense amplifier and reference current circuitry
- Patent number 9,564,188
- Issue date Feb 7, 2017
- International Business Machines Corporation
- Alexander Fritsch
- G11 - INFORMATION STORAGE
Information Patent Grant
Current-mode sense amplifier
- Patent number 9,552,851
- Issue date Jan 24, 2017
- International Business Machines Corporation
- Alexander Fritsch
- G11 - INFORMATION STORAGE
Information Patent Grant
Hierarchical negative bitline boost write assist for SRAM memory de...
- Patent number 9,431,096
- Issue date Aug 30, 2016
- International Business Machines Corporation
- Alexander Fritsch
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM array comprising multiple cell cores
- Patent number 9,384,823
- Issue date Jul 5, 2016
- International Business Machines Corporation
- Michael Kugel
- G11 - INFORMATION STORAGE
Information Patent Grant
Complementary metal-oxide-semiconductor (CMOS) min/max voltage circ...
- Patent number 8,942,052
- Issue date Jan 27, 2015
- International Business Machines Corporation
- William V. Huott
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit schematics having imbedded scaling information f...
- Patent number 8,918,749
- Issue date Dec 23, 2014
- International Business Machines Corporation
- Michael Kugel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Local evaluation circuit for static random-access memory
- Patent number 8,837,235
- Issue date Sep 16, 2014
- International Business Machines Corporation
- Yuen Hung Chan
- G11 - INFORMATION STORAGE
Information Patent Grant
Global bit line restore by most significant bit of an address line
- Patent number 8,587,990
- Issue date Nov 19, 2013
- International Business Machines Corporation
- Yuen H. Chan
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for performing a logic built-in-self-test in an electronic c...
- Patent number 7,913,136
- Issue date Mar 22, 2011
- International Business Machines Corporation
- Tilman Gloekler
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
TRUE COMPLEMENT DYNAMIC CIRCUIT AND METHOD FOR COMBINING BINARY DATA
- Publication number 20230060610
- Publication date Mar 2, 2023
- International Business Machines Corporation
- Michael Berthold Kugel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DIGITAL LOGIC CIRCUIT FOR DETERRING RACE VIOLATIONS AT AN ARRAY TES...
- Publication number 20200127649
- Publication date Apr 23, 2020
- International Business Machines Corporation
- Harry Barowski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Current-Mode Sense Amplifier
- Publication number 20180374517
- Publication date Dec 27, 2018
- International Business Machines Corporation
- Alexander Fritsch
- G11 - INFORMATION STORAGE
Information Patent Application
DIGITAL LOGIC CIRCUIT
- Publication number 20180212594
- Publication date Jul 26, 2018
- International Business Machines Corporation
- Harry Barowski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DIGITAL LOGIC CIRCUIT
- Publication number 20180212595
- Publication date Jul 26, 2018
- International Business Machines Corporation
- Harry Barowski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Current-Mode Sense Amplifier
- Publication number 20170316812
- Publication date Nov 2, 2017
- International Business Machines Corporation
- Alexander Fritsch
- G11 - INFORMATION STORAGE
Information Patent Application
RAM AT SPEED FLEXIBLE TIMING AND SETUP CONTROL
- Publication number 20170092341
- Publication date Mar 30, 2017
- International Business Machines Corporation
- Martin Eckert
- G11 - INFORMATION STORAGE
Information Patent Application
RAM AT SPEED FLEXIBLE TIMING AND SETUP CONTROL
- Publication number 20170092377
- Publication date Mar 30, 2017
- International Business Machines Corporation
- Martin Eckert
- G11 - INFORMATION STORAGE
Information Patent Application
SINGLE ENDED BITLINE CURRENT SENSE AMPLIFIER FOR SRAM APPLICATIONS
- Publication number 20170084314
- Publication date Mar 23, 2017
- International Business Machines Corporation
- Alexander Fritsch
- G11 - INFORMATION STORAGE
Information Patent Application
Current-Mode Sense Amplifier
- Publication number 20160365130
- Publication date Dec 15, 2016
- International Business Machines Corporation
- Alexander Fritsch
- G11 - INFORMATION STORAGE
Information Patent Application
Current-Mode Sense Amplifier and Reference Current Circuitry
- Publication number 20160336049
- Publication date Nov 17, 2016
- International Business Machines Corporation
- Alexander Fritsch
- G11 - INFORMATION STORAGE
Information Patent Application
SRAM ARRAY COMPRISING MULTIPLE CELL CORES
- Publication number 20160086659
- Publication date Mar 24, 2016
- International Business Machines Corporation
- Michael Kugel
- G11 - INFORMATION STORAGE
Information Patent Application
Current-Mode Sense Amplifier and Reference Current Circuitry
- Publication number 20160071555
- Publication date Mar 10, 2016
- International Business Machines Corporation
- Alexander Fritsch
- G11 - INFORMATION STORAGE
Information Patent Application
Current-Mode Sense Amplifier
- Publication number 20160072461
- Publication date Mar 10, 2016
- International Business Machines Corporation
- Alexander Fritsch
- G11 - INFORMATION STORAGE
Information Patent Application
Local Evaluation Circuit for Static Random-Access Memory
- Publication number 20140254290
- Publication date Sep 11, 2014
- INTERNATIONAL BUSINESS MACHINES CORPORATION
- Yuen Hung Chan
- G11 - INFORMATION STORAGE
Information Patent Application
Complementary Metal-Oxide-Semiconductor (CMOS) Min/Max Voltage Circ...
- Publication number 20140140157
- Publication date May 22, 2014
- International Business Machines Corporation
- William V. Huott
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT SCHEMATICS HAVING IMBEDDED SCALING INFORMATION F...
- Publication number 20140130004
- Publication date May 8, 2014
- International Business Machines Corporation
- Michael Kugel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GLOBAL BIT LINE RESTORE BY MOST SIGNIFICANT BIT OF AN ADDRESS LINE
- Publication number 20120008379
- Publication date Jan 12, 2012
- International Business Machines Corporation
- Yuen H. CHAN
- G11 - INFORMATION STORAGE
Information Patent Application
Method and Circuit Arrangement for Performing a Write Through Opera...
- Publication number 20110317478
- Publication date Dec 29, 2011
- International Business Machines Corporation
- Yuen H. Chan
- G11 - INFORMATION STORAGE
Information Patent Application
Interleave Memory Array Arrangement
- Publication number 20110310680
- Publication date Dec 22, 2011
- International Business Machines Corporation
- Yuen H. Chan
- G11 - INFORMATION STORAGE
Information Patent Application
Method for Performing a Logic Built-in-Self-Test in an Electronic C...
- Publication number 20080250289
- Publication date Oct 9, 2008
- International Business Machines Corporation
- Tilman Gloekler
- G01 - MEASURING TESTING

Michael B. Kugel

Person

Patents Grantslast 30 patents

True complement dynamic circuit and method for combining binary data

Digital logic circuit for deterring race violations at an array tes...

Digital logic circuit for deterring race violations at an array tes...

Current-mode sense amplifier

Digital logic circuit for deterring race violations at an array tes...

Current-mode sense amplifier

Current-mode sense amplifier and reference current circuitry

Current-mode sense amplifier

Stressing and testing semiconductor memory cells

RAM at speed flexible timing and setup control

RAM at speed flexible timing and setup control

Current-mode sense amplifier

Single ended bitline current sense amplifier for SRAM applications

Current-mode sense amplifier and reference current circuitry

Current-mode sense amplifier

Hierarchical negative bitline boost write assist for SRAM memory de...

SRAM array comprising multiple cell cores

Complementary metal-oxide-semiconductor (CMOS) min/max voltage circ...

Integrated circuit schematics having imbedded scaling information f...

Local evaluation circuit for static random-access memory

Global bit line restore by most significant bit of an address line

Method for performing a logic built-in-self-test in an electronic c...

Patents Applicationslast 30 patents

TRUE COMPLEMENT DYNAMIC CIRCUIT AND METHOD FOR COMBINING BINARY DATA

DIGITAL LOGIC CIRCUIT FOR DETERRING RACE VIOLATIONS AT AN ARRAY TES...

Current-Mode Sense Amplifier

DIGITAL LOGIC CIRCUIT

DIGITAL LOGIC CIRCUIT

Current-Mode Sense Amplifier

RAM AT SPEED FLEXIBLE TIMING AND SETUP CONTROL

RAM AT SPEED FLEXIBLE TIMING AND SETUP CONTROL

SINGLE ENDED BITLINE CURRENT SENSE AMPLIFIER FOR SRAM APPLICATIONS

Current-Mode Sense Amplifier

Current-Mode Sense Amplifier and Reference Current Circuitry

SRAM ARRAY COMPRISING MULTIPLE CELL CORES

Current-Mode Sense Amplifier and Reference Current Circuitry

Current-Mode Sense Amplifier

Local Evaluation Circuit for Static Random-Access Memory

Complementary Metal-Oxide-Semiconductor (CMOS) Min/Max Voltage Circ...

INTEGRATED CIRCUIT SCHEMATICS HAVING IMBEDDED SCALING INFORMATION F...

GLOBAL BIT LINE RESTORE BY MOST SIGNIFICANT BIT OF AN ADDRESS LINE

Method and Circuit Arrangement for Performing a Write Through Opera...

Interleave Memory Array Arrangement

Method for Performing a Logic Built-in-Self-Test in an Electronic C...