Michael Beck

Person

Poughkeepsie, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods of manufacturing semiconductor devices and structures thereof
- Patent number 8,093,150
- Issue date Jan 10, 2012
- Infineon Technologies AG
- Michael Beck
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit hard mask processing system
- Patent number 8,018,061
- Issue date Sep 13, 2011
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Wuping Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Minimizing low-k dielectric damage during plasma processing
- Patent number 7,691,736
- Issue date Apr 6, 2010
- Infineon Technologies AG
- Michael Beck
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal interconnect structure and method
- Patent number 7,651,942
- Issue date Jan 26, 2010
- Infineon Technologies AG
- Frank Huebinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit manufacturing method using hard mask
- Patent number 7,615,484
- Issue date Nov 10, 2009
- Chartered Semiconductor Manufacturing Ltd.
- Wuping Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Single damascene with disposable stencil and method therefore
- Patent number 7,452,804
- Issue date Nov 18, 2008
- Infineon Technologies AG
- Michael Beck
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal interconnect structure and method
- Patent number 7,332,428
- Issue date Feb 19, 2008
- Infineon Technologies AG
- Michael Beck
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
DECENTRALIZED INFORMATION SHARING NETWORK
- Publication number 20190173854
- Publication date Jun 6, 2019
- Michael Beck
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
INTEGRATED CIRCUIT HARD MASK PROCESSING SYSTEM
- Publication number 20100013104
- Publication date Jan 21, 2010
- Chartered Semiconductor Manufacturing LTD.
- Wuping Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT HARD MASK PROCESSING SYSTEM
- Publication number 20080265409
- Publication date Oct 30, 2008
- Chartered Semiconductor Manufacturing LTD.
- Wuping Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of manufacturing semiconductor devices and structures thereof
- Publication number 20080070404
- Publication date Mar 20, 2008
- Michael Beck
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Minimizing low-k dielectric damage during plasma processing
- Publication number 20070190804
- Publication date Aug 16, 2007
- Michael Beck
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Single damascene with disposable stencil and method therefore
- Publication number 20070042588
- Publication date Feb 22, 2007
- Michael Beck
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Metal interconnect structure and method
- Publication number 20070037385
- Publication date Feb 15, 2007
- Frank Huebinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of making a semiconductor interconnect with a metal cap
- Publication number 20060205204
- Publication date Sep 14, 2006
- Michael Beck
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Metal interconnect structure and method
- Publication number 20060194430
- Publication date Aug 31, 2006
- Michael Beck
- H01 - BASIC ELECTRIC ELEMENTS

Michael Beck

Person

Patents Grantslast 30 patents

Methods of manufacturing semiconductor devices and structures thereof

Integrated circuit hard mask processing system

Minimizing low-k dielectric damage during plasma processing

Metal interconnect structure and method

Integrated circuit manufacturing method using hard mask

Single damascene with disposable stencil and method therefore

Metal interconnect structure and method

Patents Applicationslast 30 patents

DECENTRALIZED INFORMATION SHARING NETWORK

INTEGRATED CIRCUIT HARD MASK PROCESSING SYSTEM

INTEGRATED CIRCUIT HARD MASK PROCESSING SYSTEM

Methods of manufacturing semiconductor devices and structures thereof

Minimizing low-k dielectric damage during plasma processing

Single damascene with disposable stencil and method therefore

Metal interconnect structure and method

Method of making a semiconductor interconnect with a metal cap

Metal interconnect structure and method