Michael D. Upton

Person

Seattle, WA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus and method for efficient gather and scatter operations
- Patent number 9,785,436
- Issue date Oct 10, 2017
- Intel Corporation
- Edward T. Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generational thread scheduler using reservations for fair scheduling
- Patent number 9,465,670
- Issue date Oct 11, 2016
- Intel Corporation
- Edward T. Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor having execution core sections operating at different clo...
- Patent number RE45487
- Issue date Apr 21, 2015
- Intel Corporation
- David J. Sager
- 713 - Electrical computers and digital processing systems: support
Information Patent Grant
Method and apparatus for assigning thread priority in a processor o...
- Patent number 8,850,165
- Issue date Sep 30, 2014
- Intel Corporation
- David W. Burns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor having execution core sections operating at different clo...
- Patent number RE44494
- Issue date Sep 10, 2013
- Intel Corporation
- David J. Sager
- 713 - Electrical computers and digital processing systems: support
Information Patent Grant
Method and apparatus for assigning thread priority in a processor o...
- Patent number 7,987,346
- Issue date Jul 26, 2011
- Intel Corporation
- David Burns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for assigning thread priority in a processor o...
- Patent number 7,877,583
- Issue date Jan 25, 2011
- Intel Corporation
- David W. Burns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for assigning thread priority in a processor o...
- Patent number 7,454,600
- Issue date Nov 18, 2008
- Intel Corporation
- David W. Burns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Use of a context identifier in a cache memory
- Patent number 7,085,889
- Issue date Aug 1, 2006
- Intel Corporation
- Per Hammarlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determining whether thread fetch operation will be blocked due to p...
- Patent number 7,010,669
- Issue date Mar 7, 2006
- Intel Corporation
- David W. Burns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for handling locks
- Patent number 6,922,745
- Issue date Jul 26, 2005
- Intel Corporation
- Harish Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor having replay architecture with fast and slow replay paths
- Patent number 6,735,688
- Issue date May 11, 2004
- Intel Corporation
- Michael D. Upton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determination of approaching instruction starvation of threads base...
- Patent number 6,651,158
- Issue date Nov 18, 2003
- Intel Corporation
- David W. Burns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing requests to efficiently access a limited bandwidth stora...
- Patent number 6,643,747
- Issue date Nov 4, 2003
- Intel Corporation
- Per H. Hammarlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor having execution core sections operating at different clo...
- Patent number 6,487,675
- Issue date Nov 26, 2002
- Intel Corporation
- David J. Sager
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for lock synchronization in a microprocessor s...
- Patent number 6,370,625
- Issue date Apr 9, 2002
- Intel Corporation
- Douglas M. Carmean
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor having execution core sections operating at different clo...
- Patent number 6,256,745
- Issue date Jul 3, 2001
- Intel Corporation
- David J. Sager
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor having execution core sections operating at different clo...
- Patent number 6,216,234
- Issue date Apr 10, 2001
- Intel Corporation
- David J. Sager
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Trace based instruction caching
- Patent number 6,170,038
- Issue date Jan 2, 2001
- Intel Corporation
- Robert F. Krick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address translation system having first and second translation look...
- Patent number 6,138,225
- Issue date Oct 24, 2000
- Intel Corporation
- Michael Upton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer processor with a replay system having a plurality of checkers
- Patent number 6,094,717
- Issue date Jul 25, 2000
- Intel Corp.
- Amit A. Merchant
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Trace based instruction caching
- Patent number 6,018,786
- Issue date Jan 25, 2000
- Intel Corporation
- Robert F. Krick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor having execution core sections operating at different clo...
- Patent number 5,828,868
- Issue date Oct 27, 1998
- Intel Corporation
- David J. Sager
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for designing the layout of a subcircuit in an...
- Patent number 5,351,197
- Issue date Sep 27, 1994
- Cascade Design Automation Corporation
- Michael D. Upton
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS TO IMPLEMENT ADAPTIVE BRANCH PREDICTION THROTT...
- Publication number 20250004781
- Publication date Jan 2, 2025
- Intel Corporation
- Zeshan CHISHTI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Generational Thread Scheduler
- Publication number 20170031729
- Publication date Feb 2, 2017
- Intel Corporation
- Edward T. Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR EFFICIENT GATHER AND SCATTER OPERATIONS
- Publication number 20140095831
- Publication date Apr 3, 2014
- Edward T. Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERATIONAL THREAD SCHEDULER
- Publication number 20130160020
- Publication date Jun 20, 2013
- Edward T. Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR HAVING EXECUTION CORE SECTIONS OPERATING AT DIFFERENT CLO...
- Publication number 20120042151
- Publication date Feb 16, 2012
- David J. Sager
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Assigning Thread Priority in a Processor o...
- Publication number 20110239221
- Publication date Sep 29, 2011
- David W. Burns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR ASSIGNING THREAD PRIORITY IN A PROCESSOR O...
- Publication number 20110113222
- Publication date May 12, 2011
- Intel Corporation
- David W. BURNS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR ASSIGNING THREAD PRIORITY IN A PROCESSOR O...
- Publication number 20090070562
- Publication date Mar 12, 2009
- Intel Corporation
- David W. BURNS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus handling locks
- Publication number 20050216673
- Publication date Sep 29, 2005
- Harish Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for resolving instruction starvation in a proc...
- Publication number 20040078794
- Publication date Apr 22, 2004
- David W. Burns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for handling locks
- Publication number 20030208647
- Publication date Nov 6, 2003
- Harish Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Use of a context identifier in a cache memory
- Publication number 20030182512
- Publication date Sep 25, 2003
- Per Hammarlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Controlling a store data forwarding mechanism during execution of a...
- Publication number 20030177312
- Publication date Sep 18, 2003
- Aravindh Baktha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for assigning thread priority in a processor o...
- Publication number 20020199088
- Publication date Dec 26, 2002
- David W. Burns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for resolving instruction starvation in a proc...
- Publication number 20020199089
- Publication date Dec 26, 2002
- David W. Burns
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processing requests to efficiently access a limited bandwidth stora...
- Publication number 20020083244
- Publication date Jun 27, 2002
- Per H. Hammarlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor having execution core sections operating at different clo...
- Publication number 20010029590
- Publication date Oct 11, 2001
- Intel Corporation
- David J. Sager
- G06 - COMPUTING CALCULATING COUNTING

Michael D. Upton

Person

Patents Grantslast 30 patents

Apparatus and method for efficient gather and scatter operations

Generational thread scheduler using reservations for fair scheduling

Processor having execution core sections operating at different clo...

Method and apparatus for assigning thread priority in a processor o...

Processor having execution core sections operating at different clo...

Method and apparatus for assigning thread priority in a processor o...

Method and apparatus for assigning thread priority in a processor o...

Method and apparatus for assigning thread priority in a processor o...

Use of a context identifier in a cache memory

Determining whether thread fetch operation will be blocked due to p...

Method and apparatus for handling locks

Processor having replay architecture with fast and slow replay paths

Determination of approaching instruction starvation of threads base...

Processing requests to efficiently access a limited bandwidth stora...

Processor having execution core sections operating at different clo...

Method and apparatus for lock synchronization in a microprocessor s...

Processor having execution core sections operating at different clo...

Processor having execution core sections operating at different clo...

Trace based instruction caching

Address translation system having first and second translation look...

Computer processor with a replay system having a plurality of checkers

Trace based instruction caching

Processor having execution core sections operating at different clo...

Method and apparatus for designing the layout of a subcircuit in an...

Patents Applicationslast 30 patents

METHOD AND APPARATUS TO IMPLEMENT ADAPTIVE BRANCH PREDICTION THROTT...

Generational Thread Scheduler

APPARATUS AND METHOD FOR EFFICIENT GATHER AND SCATTER OPERATIONS

GENERATIONAL THREAD SCHEDULER

PROCESSOR HAVING EXECUTION CORE SECTIONS OPERATING AT DIFFERENT CLO...

Method and Apparatus for Assigning Thread Priority in a Processor o...

METHOD AND APPARATUS FOR ASSIGNING THREAD PRIORITY IN A PROCESSOR O...

METHOD AND APPARATUS FOR ASSIGNING THREAD PRIORITY IN A PROCESSOR O...

Method and apparatus handling locks

Method and apparatus for resolving instruction starvation in a proc...

Method and apparatus for handling locks

Use of a context identifier in a cache memory

Controlling a store data forwarding mechanism during execution of a...

Method and apparatus for assigning thread priority in a processor o...

Method and apparatus for resolving instruction starvation in a proc...

Processing requests to efficiently access a limited bandwidth stora...

Processor having execution core sections operating at different clo...