Michael Danilenko

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West St. Paul, MN, US

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Patents Grantslast 30 patents

Information Patent Grant
Multi-function timing sequencer for different speed main storage units
- Patent number 5,045,999
- Issue date Sep 3, 1991
- Unisys Corporation
- Michael Danilenko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual cache RAM for rapid invalidation
- Patent number 4,930,106
- Issue date May 29, 1990
- Unisys Corporation
- Michael Danilenko
- G11 - INFORMATION STORAGE
Information Patent Grant
Electronic data processing system overlaid jump mechanism
- Patent number 4,736,292
- Issue date Apr 5, 1988
- Unisys Corporation
- Michael Danilenko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction buffer for a digital data processing system
- Patent number 4,691,279
- Issue date Sep 1, 1987
- Unisys Corporation
- Michael Danilenko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Buffer memory referencing system for two data words
- Patent number 4,381,541
- Issue date Apr 26, 1983
- Sperry Corporation
- Charles G. Baumann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pre-emptive, rotational priority system
- Patent number 4,009,470
- Issue date Feb 22, 1977
- Sperry Rand Corporation
- Michael Danilenko
- G06 - COMPUTING CALCULATING COUNTING