Michael Davies

Person

Santa Monica, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Trace-based neuromorphic architecture for advanced learning
- Patent number 11,037,054
- Issue date Jun 15, 2021
- Intel Corporation
- Michael I Davies
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable epoch spike train filtering
- Patent number 10,956,811
- Issue date Mar 23, 2021
- Intel Corporation
- Michael I. Davies
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Population-based connectivity architecture for spiking neural networks
- Patent number 10,867,238
- Issue date Dec 15, 2020
- Intel Corporation
- Michael I. Davies
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable neuromorphic core with shared synaptic memory and variable...
- Patent number 10,824,937
- Issue date Nov 3, 2020
- Intel Corporation
- Michael I. Davies
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Neuromorphic core and chip traffic control
- Patent number 10,810,488
- Issue date Oct 20, 2020
- Intel Corporation
- Michael I Davies
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable frame processing pipeline in a packet switch
- Patent number 8,571,031
- Issue date Oct 29, 2013
- Intel Corporation
- Michael Davies
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Flow and congestion control in switch architectures for multi-hop,...
- Patent number 8,467,342
- Issue date Jun 18, 2013
- Intel Corporation
- Zhi-Hern Loh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Logic synthesis of multi-level domino asynchronous pipelines
- Patent number 8,051,396
- Issue date Nov 1, 2011
- Fulcrum Microsystems, Inc.
- Peter Beerel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flow and congestion control in switch architectures for multi-hop,...
- Patent number 7,916,718
- Issue date Mar 29, 2011
- Fulcrum Microsystems, Inc.
- Zhi-Hern Loh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Traffic distribution techniques utilizing initial and scrambled has...
- Patent number 7,821,925
- Issue date Oct 26, 2010
- Fulcrum Microsystems, Inc.
- Michael Davies
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Logic synthesis of multi-level domino asynchronous pipelines
- Patent number 7,584,449
- Issue date Sep 1, 2009
- Fulcrum Microsystems, Inc.
- Peter Beerel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for facilitating conversion between asynchronous and syn...
- Patent number 6,961,863
- Issue date Nov 1, 2005
- Fulcrum Microsystems Inc.
- Michael I. Davies
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for facilitating conversion between asynchronous and syn...
- Patent number 6,950,959
- Issue date Sep 27, 2005
- Fulcrum Microystems Inc.
- Michael I. Davies
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
TRACE-BASED NEUROMORPHIC ARCHITECTURE FOR ADVANCED LEARNING
- Publication number 20210304005
- Publication date Sep 30, 2021
- Intel Corporation
- Michael I. Davies
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VARIABLE EPOCH SPIKE TRAIN FILTERING
- Publication number 20190034782
- Publication date Jan 31, 2019
- Intel Corporation
- Michael I. Davies
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEUROMORPHIC CORE AND CHIP TRAFFIC CONTROL
- Publication number 20180174032
- Publication date Jun 21, 2018
- Intel Corporation
- Michael I. Davies
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRACE-BASED NEUROMORPHIC ARCHITECTURE FOR ADVANCED LEARNING
- Publication number 20180174040
- Publication date Jun 21, 2018
- Michael I. Davies
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE NEUROMORPHIC CORE WITH SHARED SYNAPTIC MEMORY AND VARIABLE...
- Publication number 20180174026
- Publication date Jun 21, 2018
- Michael I. Davies
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POPULATION-BASED CONNECTIVITY ARCHITECTURE FOR SPIKING NEURAL NETWORKS
- Publication number 20180174033
- Publication date Jun 21, 2018
- Michael I. Davies
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTATIONALLY-EFFICIENT SPIKE TRAIN FILTERING
- Publication number 20180174039
- Publication date Jun 21, 2018
- Michael I. Davies
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-COMPARTMENT DENDRITES IN NEUROMORPHIC COMPUTING
- Publication number 20180174027
- Publication date Jun 21, 2018
- Michael I. Davies
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPARSE CODING USING NEUROMORPHIC COMPUTING
- Publication number 20180174028
- Publication date Jun 21, 2018
- Intel Corporation
- Tsung-Han Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLOW AND CONGESTION CONTROL IN SWITCH ARCHITECTURES FOR MULTI-HOP,...
- Publication number 20110164496
- Publication date Jul 7, 2011
- Fulcrum Microsystems Inc.
- Zhi-Hern Loh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CONFIGURABLE FRAME PROCESSING PIPELINE IN A PACKET SWITCH
- Publication number 20110080916
- Publication date Apr 7, 2011
- Fulcrum Microsystems, Inc.
- Michael Davies
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LOGIC SYNTHESIS OF MULTI-LEVEL DOMINO ASYNCHRONOUS PIPELINES
- Publication number 20090217232
- Publication date Aug 27, 2009
- Fulcrum Microsystems, Inc.
- Peter Beerel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLOW AND CONGESTION CONTROL IN SWITCH ARCHITECTURES FOR MULTI-HOP,...
- Publication number 20080259798
- Publication date Oct 23, 2008
- Fulcrum Microsystems Inc.
- Zhi-Hern Loh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TRAFFIC DISTRIBUTION TECHNIQUES
- Publication number 20080181103
- Publication date Jul 31, 2008
- Fulcrum Microsystems Inc.
- Michael Davies
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Logic synthesis of multi-level domino asynchronous pipelines
- Publication number 20060120189
- Publication date Jun 8, 2006
- Fulcrum Microsystems, Inc.
- Peter Beerel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques for facilitating conversion between asynchronous and syn...
- Publication number 20030165158
- Publication date Sep 4, 2003
- Fulcrum Microsystems Inc.
- Michael I. Davies
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques for facilitating conversion between asynchronous and syn...
- Publication number 20030159078
- Publication date Aug 21, 2003
- Fulcrum Microsystems Inc.
- Michael I. Davies
- G06 - COMPUTING CALCULATING COUNTING

Michael Davies

Person

Patents Grantslast 30 patents

Trace-based neuromorphic architecture for advanced learning

Variable epoch spike train filtering

Population-based connectivity architecture for spiking neural networks

Scalable neuromorphic core with shared synaptic memory and variable...

Neuromorphic core and chip traffic control

Configurable frame processing pipeline in a packet switch

Flow and congestion control in switch architectures for multi-hop,...

Logic synthesis of multi-level domino asynchronous pipelines

Flow and congestion control in switch architectures for multi-hop,...

Traffic distribution techniques utilizing initial and scrambled has...

Logic synthesis of multi-level domino asynchronous pipelines

Techniques for facilitating conversion between asynchronous and syn...

Techniques for facilitating conversion between asynchronous and syn...

Patents Applicationslast 30 patents

TRACE-BASED NEUROMORPHIC ARCHITECTURE FOR ADVANCED LEARNING

VARIABLE EPOCH SPIKE TRAIN FILTERING

NEUROMORPHIC CORE AND CHIP TRAFFIC CONTROL

TRACE-BASED NEUROMORPHIC ARCHITECTURE FOR ADVANCED LEARNING

SCALABLE NEUROMORPHIC CORE WITH SHARED SYNAPTIC MEMORY AND VARIABLE...

POPULATION-BASED CONNECTIVITY ARCHITECTURE FOR SPIKING NEURAL NETWORKS

COMPUTATIONALLY-EFFICIENT SPIKE TRAIN FILTERING

MULTI-COMPARTMENT DENDRITES IN NEUROMORPHIC COMPUTING

SPARSE CODING USING NEUROMORPHIC COMPUTING

FLOW AND CONGESTION CONTROL IN SWITCH ARCHITECTURES FOR MULTI-HOP,...

CONFIGURABLE FRAME PROCESSING PIPELINE IN A PACKET SWITCH

LOGIC SYNTHESIS OF MULTI-LEVEL DOMINO ASYNCHRONOUS PIPELINES

FLOW AND CONGESTION CONTROL IN SWITCH ARCHITECTURES FOR MULTI-HOP,...

TRAFFIC DISTRIBUTION TECHNIQUES

Logic synthesis of multi-level domino asynchronous pipelines

Techniques for facilitating conversion between asynchronous and syn...

Techniques for facilitating conversion between asynchronous and syn...