Michael Kerstan

Person

Burghausen, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Method for polishing a semiconductor wafer
- Patent number 10,707,069
- Issue date Jul 7, 2020
- Siltronic AG
- Juergen Schwandner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Carrier, method for coating a carrier, and method for the simultane...
- Patent number 9,539,695
- Issue date Jan 10, 2017
- Siltronic AG
- Georg Pietsch
- B24 - GRINDING POLISHING
Information Patent Grant
Method and apparatus for trimming the working layers of a double-si...
- Patent number 9,011,209
- Issue date Apr 21, 2015
- Siltronic AG
- Georg Pietsch
- B24 - GRINDING POLISHING
Information Patent Grant
Method for trimming the working layers of a double-side grinding ap...
- Patent number 8,986,070
- Issue date Mar 24, 2015
- Siltronic AG
- Georg Pietsch
- B24 - GRINDING POLISHING
Information Patent Grant
Insert carrier and method for the simultaneous double-side material...
- Patent number 8,974,267
- Issue date Mar 10, 2015
- Siltronic AG
- Georg Pietsch
- B24 - GRINDING POLISHING
Information Patent Grant
Method for trimming the working layers of a double-side grinding ap...
- Patent number 8,911,281
- Issue date Dec 16, 2014
- Siltronic AG
- Georg Pietsch
- B24 - GRINDING POLISHING
Information Patent Grant
Method for producing a semiconductor wafer
- Patent number 8,685,270
- Issue date Apr 1, 2014
- Siltronic AG
- Juergen Schwandner
- B24 - GRINDING POLISHING
Information Patent Grant
Method for producing a semiconductor wafer
- Patent number 8,529,315
- Issue date Sep 10, 2013
- Siltronic AG
- Juergen Schwandner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for the simultaneous double-sided material removal processin...
- Patent number 8,512,099
- Issue date Aug 20, 2013
- Siltronic AG
- Michael Kerstan
- B24 - GRINDING POLISHING
Information Patent Grant
Method for the simultaneous grinding of a plurality of semiconducto...
- Patent number 8,113,913
- Issue date Feb 14, 2012
- Siltronic AG
- Georg Pietsch
- B24 - GRINDING POLISHING
Information Patent Grant
Semiconductor wafer, apparatus and process for producing the semico...
- Patent number 7,867,059
- Issue date Jan 11, 2011
- Siltronic AG
- Georg Pietsch
- B24 - GRINDING POLISHING
Information Patent Grant
Method for the simultaneous double-side grinding of a plurality of...
- Patent number 7,815,489
- Issue date Oct 19, 2010
- Siltronic AG
- Georg Pietsch
- B24 - GRINDING POLISHING
Information Patent Grant
Semiconductor wafer with improved local flatness, and method for it...
- Patent number 7,077,726
- Issue date Jul 18, 2006
- Siltronic AG
- Georg J. Pietsch
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method and device for nondestructive detection of crystal defects
- Patent number 6,362,487
- Issue date Mar 26, 2002
- Wacker Siltronic Gesellschaft fur Halbleitermaterialien AG
- Andreas Ehlert
- C30 - CRYSTAL GROWTH

Patents Applicationslast 30 patents

Information Patent Application
METHOD FOR GRINDING SEMICONDUCTOR WAFERS
- Publication number 20240379342
- Publication date Nov 14, 2024
- Siltronic AG
- Stephan OBERHANS
- B24 - GRINDING POLISHING
Information Patent Application
METHOD FOR GRINDING SEMICONDUCTOR WAFERS
- Publication number 20230162969
- Publication date May 25, 2023
- Siltronic AG
- Michael Kerstan
- B24 - GRINDING POLISHING
Information Patent Application
METHOD AND APPARATUS FOR TRIMMING THE WORKING LAYERS OF A DOUBLE-SI...
- Publication number 20140170942
- Publication date Jun 19, 2014
- Siltronic AG
- Georg Pietsch
- B24 - GRINDING POLISHING
Information Patent Application
METHOD AND APPARATUS FOR TRIMMING THE WORKING LAYERS OF A DOUBLE-SI...
- Publication number 20140170939
- Publication date Jun 19, 2014
- Siltronic AG
- Georg Pietsch
- B24 - GRINDING POLISHING
Information Patent Application
INSERT CARRIER AND METHOD FOR THE SIMULTANEOUS DOUBLE-SIDE MATERIAL...
- Publication number 20120190277
- Publication date Jul 26, 2012
- Siltronic AG
- Georg Pietsch
- B24 - GRINDING POLISHING
Information Patent Application
METHOD AND APPARATUS FOR TRIMMING THE WORKING LAYERS OF A DOUBLE-SI...
- Publication number 20120028546
- Publication date Feb 2, 2012
- Siltronic AG
- Georg Pietsch
- B24 - GRINDING POLISHING
Information Patent Application
METHOD FOR POLISHING A SEMICONDUCTOR WAFER
- Publication number 20110223841
- Publication date Sep 15, 2011
- Siltronic AG
- Juergen Schwandner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PRODUCING A SEMICONDUCTOR WAFER
- Publication number 20110183582
- Publication date Jul 28, 2011
- Siltronic AG
- Juergen Schwandner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PRODUCING A SEMICONDUCTOR WAFER
- Publication number 20110097975
- Publication date Apr 28, 2011
- Siltronic AG
- Juergen SCHWANDNER
- B24 - GRINDING POLISHING
Information Patent Application
Device For The Double-Sided Processing Of Flat Workpieces and Metho...
- Publication number 20100099337
- Publication date Apr 22, 2010
- Siltronic AG
- Michael Kerstan
- B24 - GRINDING POLISHING
Information Patent Application
Semiconductor Wafer, Apparatus and Process For Producing The Semico...
- Publication number 20090203297
- Publication date Aug 13, 2009
- Siltronic AG
- Georg Pietsch
- B24 - GRINDING POLISHING
Information Patent Application
Carrier, Method For Coating A Carrier, and Method For The Simultane...
- Publication number 20090104852
- Publication date Apr 23, 2009
- Siltronic AG
- Georg Pietsch
- B24 - GRINDING POLISHING
Information Patent Application
Method For The Simultaneous Grinding Of A Plurality Of Semiconducto...
- Publication number 20080233840
- Publication date Sep 25, 2008
- Siltronic AG
- Georg Pietsch
- B24 - GRINDING POLISHING
Information Patent Application
Method For The Simultaneous Double-Side Grinding Of A Plurality Of...
- Publication number 20080014839
- Publication date Jan 17, 2008
- Siltronic AG
- Georg Pietsch
- B24 - GRINDING POLISHING
Information Patent Application
Semiconductor wafer, apparatus and process for producing the semico...
- Publication number 20050173377
- Publication date Aug 11, 2005
- Georg Pietsch
- B24 - GRINDING POLISHING
Information Patent Application
Semiconductor wafer with improved local flatness, and method for it...
- Publication number 20030060050
- Publication date Mar 27, 2003
- WACKER SILTRONIC GESELLSCHAFT FUR HALBLEITERMATERIALIEN AG
- Georg J. Pietsch
- H01 - BASIC ELECTRIC ELEMENTS

Michael Kerstan

Person

Patents Grantslast 30 patents

Method for polishing a semiconductor wafer

Carrier, method for coating a carrier, and method for the simultane...

Method and apparatus for trimming the working layers of a double-si...

Method for trimming the working layers of a double-side grinding ap...

Insert carrier and method for the simultaneous double-side material...

Method for trimming the working layers of a double-side grinding ap...

Method for producing a semiconductor wafer

Method for producing a semiconductor wafer

Method for the simultaneous double-sided material removal processin...

Method for the simultaneous grinding of a plurality of semiconducto...

Semiconductor wafer, apparatus and process for producing the semico...

Method for the simultaneous double-side grinding of a plurality of...

Semiconductor wafer with improved local flatness, and method for it...

Method and device for nondestructive detection of crystal defects

Patents Applicationslast 30 patents

METHOD FOR GRINDING SEMICONDUCTOR WAFERS

METHOD FOR GRINDING SEMICONDUCTOR WAFERS

METHOD AND APPARATUS FOR TRIMMING THE WORKING LAYERS OF A DOUBLE-SI...

METHOD AND APPARATUS FOR TRIMMING THE WORKING LAYERS OF A DOUBLE-SI...

INSERT CARRIER AND METHOD FOR THE SIMULTANEOUS DOUBLE-SIDE MATERIAL...

METHOD AND APPARATUS FOR TRIMMING THE WORKING LAYERS OF A DOUBLE-SI...

METHOD FOR POLISHING A SEMICONDUCTOR WAFER

METHOD FOR PRODUCING A SEMICONDUCTOR WAFER

METHOD FOR PRODUCING A SEMICONDUCTOR WAFER

Device For The Double-Sided Processing Of Flat Workpieces and Metho...

Semiconductor Wafer, Apparatus and Process For Producing The Semico...

Carrier, Method For Coating A Carrier, and Method For The Simultane...

Method For The Simultaneous Grinding Of A Plurality Of Semiconducto...

Method For The Simultaneous Double-Side Grinding Of A Plurality Of...

Semiconductor wafer, apparatus and process for producing the semico...

Semiconductor wafer with improved local flatness, and method for it...