MICHAEL KLEIN

Person

BOEBLINGEN, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Rounding hexadecimal floating point numbers using binary incrementors
- Patent number 12,190,078
- Issue date Jan 7, 2025
- International Business Machines Corporation
- Michael Klein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Verifying the correctness of a leading zero counter
- Patent number 12,056,465
- Issue date Aug 6, 2024
- International Business Machines Corporation
- Michael Klein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Repurposed hexadecimal floating point data path
- Patent number 11,861,325
- Issue date Jan 2, 2024
- International Business Machines Corporation
- Nicol Hofmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hexadecimal floating point multiply and add instruction
- Patent number 11,531,546
- Issue date Dec 20, 2022
- International Business Machines Corporation
- Eric Mark Schwarz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector pack and unpack instructions
- Patent number 11,442,726
- Issue date Sep 13, 2022
- International Business Machines Corporation
- Eric Mark Schwarz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient checking of a condition code anticipator for a floating p...
- Patent number 11,314,512
- Issue date Apr 26, 2022
- International Business Machines Corporation
- Petra Leber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reusing adjacent SIMD unit for fast wide result generation
- Patent number 11,269,651
- Issue date Mar 8, 2022
- International Business Machines Corporation
- Michael Klein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Repurposed hexadecimal floating point data path
- Patent number 11,188,299
- Issue date Nov 30, 2021
- International Business Machines Corporation
- Nicol Hofmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hexadecimal exponent alignment for binary floating point unit
- Patent number 11,175,890
- Issue date Nov 16, 2021
- International Business Machines Corporation
- Kerstin Claudia Schelm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Residue checking of entire normalizer output of an extended result
- Patent number 11,159,183
- Issue date Oct 26, 2021
- International Business Machines Corporation
- Nicol Hofmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fault-tolerant clock gating
- Patent number 11,099,602
- Issue date Aug 24, 2021
- International Business Machines Corporation
- Razvan Peter Figuli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for wiring multiple technology evaluation circ...
- Patent number 10,983,159
- Issue date Apr 20, 2021
- International Business Machines Corporation
- Stefan Payer
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit control latch protection
- Patent number 10,890,622
- Issue date Jan 12, 2021
- International Business Machines Corporation
- Stefan Payer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel decimal multiplication hardware with a 3x generator
- Patent number 10,572,223
- Issue date Feb 25, 2020
- International Business Machines Corporation
- Steven R. Carlough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiply-add operations of binary numbers in an arithmetic unit
- Patent number 10,558,432
- Issue date Feb 11, 2020
- International Business Machines Corporation
- Tina Babinsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decimal and binary floating point arithmetic calculations
- Patent number 10,416,962
- Issue date Sep 17, 2019
- International Business Machines Corporation
- Steven R. Carlough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiply-add operations of binary numbers in an arithmetic unit
- Patent number 10,372,417
- Issue date Aug 6, 2019
- International Business Machines Corporation
- Tina Babinsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel decimal multiplication hardware with a 3X generator
- Patent number 10,310,815
- Issue date Jun 4, 2019
- International Business Machines Corporation
- Steven R. Carlough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiply-add operations of binary numbers in an arithmetic unit
- Patent number 10,296,294
- Issue date May 21, 2019
- International Business Machines Corporation
- Tina Babinsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combining of several execution units to compute a single wide scala...
- Patent number 10,275,391
- Issue date Apr 30, 2019
- International Business Machines Corporation
- Nicol Hofmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rapid character substring searching
- Patent number 10,169,451
- Issue date Jan 1, 2019
- International Business Machines Corporation
- Stefan Payer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computing and summing up multiple products in a single multiplier
- Patent number 10,140,090
- Issue date Nov 27, 2018
- International Business Machines Corporation
- Michael Klein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Binary fused multiply-add floating-point calculations
- Patent number 9,959,093
- Issue date May 1, 2018
- International Business Machines Corporation
- Michael Klein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Binary fused multiply-add floating-point calculations
- Patent number 9,952,829
- Issue date Apr 24, 2018
- International Business Machines Corporation
- Michael Klein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-local error detection in processor systems
- Patent number 9,928,135
- Issue date Mar 27, 2018
- International Business Machines Corporation
- Steven R. Carlough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Post-silicon configurable instruction behavior based on input operands
- Patent number 9,734,126
- Issue date Aug 15, 2017
- International Business Machines Corporation
- James R. Cuffney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-local error detection in processor systems
- Patent number 9,697,074
- Issue date Jul 4, 2017
- Internatioanl Business Machines Corporation
- Steven R. Carlough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using error correcting codes for parity purposes
- Patent number 9,529,664
- Issue date Dec 27, 2016
- International Business Machines Corporation
- Son T. Dao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Using error correcting codes for parity purposes
- Patent number 9,513,987
- Issue date Dec 6, 2016
- International Business Machines Corporation
- Son T. Dao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fused multiply add pipeline
- Patent number 9,430,190
- Issue date Aug 30, 2016
- International Business Machines Corporation
- Son Dao Trong
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
VERIFYING THE CORRECTNESS OF A LEADING ZERO COUNTER
- Publication number 20230315394
- Publication date Oct 5, 2023
- International Business Machines Corporation
- Michael Klein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROUNDING HEXADECIMAL FLOATING POINT NUMBERS USING BINARY INCREMENTORS
- Publication number 20230315386
- Publication date Oct 5, 2023
- International Business Machines Corporation
- Michael Klein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCED LOGIC CONVERSION OF BINARY INTEGERS TO BINARY CODED DECIMALS
- Publication number 20230308113
- Publication date Sep 28, 2023
- International Business Machines Corporation
- KERSTIN CLAUDIA SCHELM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLOATING-POINT CONVERSION WITH DENORMALIZATION
- Publication number 20230297334
- Publication date Sep 21, 2023
- International Business Machines Corporation
- Michael Klein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE DEVICE TO EXECUTE INSTRUCTION TO CONVERT INPUT VALUE FROM...
- Publication number 20230289139
- Publication date Sep 14, 2023
- International Business Machines Corporation
- Kerstin Claudia Schelm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE DEVICE TO EXECUTE INSTRUCTION TO CONVERT INPUT VALUE FROM...
- Publication number 20230289138
- Publication date Sep 14, 2023
- International Business Machines Corporation
- Petra Leber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC ALGORITHM SELECTION
- Publication number 20230273769
- Publication date Aug 31, 2023
- International Business Machines Corporation
- Kerstin Claudia Schelm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HEXADECIMAL FLOATING POINT MULTIPLY AND ADD INSTRUCTION
- Publication number 20220283818
- Publication date Sep 8, 2022
- International Business Machines Corporation
- Eric Mark Schwarz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR PACK AND UNPACK INSTRUCTIONS
- Publication number 20220276866
- Publication date Sep 1, 2022
- International Business Machines Corporation
- Eric Mark Schwarz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REPURPOSED HEXADECIMAL FLOATING POINT DATA PATH
- Publication number 20220004361
- Publication date Jan 6, 2022
- International Business Machines Corporation
- Nicol Hofmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REUSING ADJACENT SIMD UNIT FOR FAST WIDE RESULT GENERATION
- Publication number 20210073000
- Publication date Mar 11, 2021
- International Business Machines Corporation
- MICHAEL KLEIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTIAL PRODUCT FLOATING-POINT MULTIPLICATION CIRCUITRY OPERAND SUM...
- Publication number 20210048982
- Publication date Feb 18, 2021
- International Business Machines Corporation
- Michael Klein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT CHECKING OF A CONDITION CODE ANTICIPATOR FOR A FLOATING P...
- Publication number 20210042119
- Publication date Feb 11, 2021
- International Business Machines Corporation
- Petra Leber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REPURPOSED HEXADECIMAL FLOATING POINT DATA PATH
- Publication number 20210034325
- Publication date Feb 4, 2021
- International Business Machines Corporation
- Nicol Hofmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RESIDUE CHECKING OF ENTIRE NORMALIZER OUTPUT OF AN EXTENDED RESULT
- Publication number 20200412388
- Publication date Dec 31, 2020
- International Business Machines Corporation
- Nicol Hofmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HEXADECIMAL EXPONENT ALIGNMENT FOR BINARY FLOATING POINT UNIT
- Publication number 20200348908
- Publication date Nov 5, 2020
- International Business Machines Corporation
- Kerstin Claudia Schelm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAULT-TOLERANT CLOCK GATING
- Publication number 20200348718
- Publication date Nov 5, 2020
- International Business Machines Corporation
- Razvan Peter Figuli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT CONTROL LATCH PROTECTION
- Publication number 20200341839
- Publication date Oct 29, 2020
- International Business Machines Corporation
- Stefan Payer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Wiring Multiple Technology Evaluation Circ...
- Publication number 20200200818
- Publication date Jun 25, 2020
- International Business Machines Corporation
- Stefan Payer
- G01 - MEASURING TESTING
Information Patent Application
PARALLEL DECIMAL MULTIPLICATION HARDWARE WITH A 3X GENERATOR
- Publication number 20190212983
- Publication date Jul 11, 2019
- International Business Machines Corporation
- Steven R. Carlough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL DECIMAL MULTIPLICATION HARDWARE WITH A 3X GENERATOR
- Publication number 20190163445
- Publication date May 30, 2019
- International Business Machines Corporation
- Steven R. Carlough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLY-ADD OPERATIONS OF BINARY NUMBERS IN AN ARITHMETIC UNIT
- Publication number 20190018655
- Publication date Jan 17, 2019
- International Business Machines Corporation
- Tina Babinsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLY-ADD OPERATIONS OF BINARY NUMBERS IN AN ARITHMETIC UNIT
- Publication number 20190018653
- Publication date Jan 17, 2019
- International Business Machines Corporation
- Tina Babinsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLY-ADD OPERATIONS OF BINARY NUMBERS IN AN ARITHMETIC UNIT
- Publication number 20190018654
- Publication date Jan 17, 2019
- International Business Machines Corporation
- Tina Babinsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMBINING OF SEVERAL EXECUTION UNITS TO COMPUTE A SINGLE WIDE SCALA...
- Publication number 20180210859
- Publication date Jul 26, 2018
- International Business Machines Corporation
- Nicol Hofmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTING AND SUMMING UP MULTIPLE PRODUCTS IN A SINGLE MULTIPLIER
- Publication number 20180088905
- Publication date Mar 29, 2018
- International Business Machines Corporation
- Michael Klein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BINARY FUSED MULTIPLY-ADD FLOATING-POINT CALCULATIONS
- Publication number 20170220319
- Publication date Aug 3, 2017
- International Business Machines Corporation
- Michael Klein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BINARY FUSED MULTIPLY-ADD FLOATING-POINT CALCULATIONS
- Publication number 20170220318
- Publication date Aug 3, 2017
- International Business Machines Corporation
- Michael Klein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USING ERROR CORRECTING CODES FOR PARITY PURPOSES
- Publication number 20160357636
- Publication date Dec 8, 2016
- Son T. Dao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-LOCAL ERROR DETECTION IN PROCESSOR SYSTEMS
- Publication number 20160170829
- Publication date Jun 16, 2016
- International Business Machines Corporation
- Steven R. Carlough
- G06 - COMPUTING CALCULATING COUNTING

MICHAEL KLEIN

Person

Patents Grantslast 30 patents

Rounding hexadecimal floating point numbers using binary incrementors

Verifying the correctness of a leading zero counter

Repurposed hexadecimal floating point data path

Hexadecimal floating point multiply and add instruction

Vector pack and unpack instructions

Efficient checking of a condition code anticipator for a floating p...

Reusing adjacent SIMD unit for fast wide result generation

Repurposed hexadecimal floating point data path

Hexadecimal exponent alignment for binary floating point unit

Residue checking of entire normalizer output of an extended result

Fault-tolerant clock gating

Method and apparatus for wiring multiple technology evaluation circ...

Integrated circuit control latch protection

Parallel decimal multiplication hardware with a 3x generator

Multiply-add operations of binary numbers in an arithmetic unit

Decimal and binary floating point arithmetic calculations

Multiply-add operations of binary numbers in an arithmetic unit

Parallel decimal multiplication hardware with a 3X generator

Multiply-add operations of binary numbers in an arithmetic unit

Combining of several execution units to compute a single wide scala...

Rapid character substring searching

Computing and summing up multiple products in a single multiplier

Binary fused multiply-add floating-point calculations

Binary fused multiply-add floating-point calculations

Non-local error detection in processor systems

Post-silicon configurable instruction behavior based on input operands

Non-local error detection in processor systems

Using error correcting codes for parity purposes

Using error correcting codes for parity purposes

Fused multiply add pipeline

Patents Applicationslast 30 patents

VERIFYING THE CORRECTNESS OF A LEADING ZERO COUNTER

ROUNDING HEXADECIMAL FLOATING POINT NUMBERS USING BINARY INCREMENTORS

REDUCED LOGIC CONVERSION OF BINARY INTEGERS TO BINARY CODED DECIMALS

FLOATING-POINT CONVERSION WITH DENORMALIZATION

HARDWARE DEVICE TO EXECUTE INSTRUCTION TO CONVERT INPUT VALUE FROM...

HARDWARE DEVICE TO EXECUTE INSTRUCTION TO CONVERT INPUT VALUE FROM...

DYNAMIC ALGORITHM SELECTION

HEXADECIMAL FLOATING POINT MULTIPLY AND ADD INSTRUCTION

VECTOR PACK AND UNPACK INSTRUCTIONS

REPURPOSED HEXADECIMAL FLOATING POINT DATA PATH

REUSING ADJACENT SIMD UNIT FOR FAST WIDE RESULT GENERATION

PARTIAL PRODUCT FLOATING-POINT MULTIPLICATION CIRCUITRY OPERAND SUM...

EFFICIENT CHECKING OF A CONDITION CODE ANTICIPATOR FOR A FLOATING P...

REPURPOSED HEXADECIMAL FLOATING POINT DATA PATH

RESIDUE CHECKING OF ENTIRE NORMALIZER OUTPUT OF AN EXTENDED RESULT

HEXADECIMAL EXPONENT ALIGNMENT FOR BINARY FLOATING POINT UNIT

FAULT-TOLERANT CLOCK GATING

INTEGRATED CIRCUIT CONTROL LATCH PROTECTION

Method and Apparatus for Wiring Multiple Technology Evaluation Circ...

PARALLEL DECIMAL MULTIPLICATION HARDWARE WITH A 3X GENERATOR

PARALLEL DECIMAL MULTIPLICATION HARDWARE WITH A 3X GENERATOR

MULTIPLY-ADD OPERATIONS OF BINARY NUMBERS IN AN ARITHMETIC UNIT

MULTIPLY-ADD OPERATIONS OF BINARY NUMBERS IN AN ARITHMETIC UNIT

MULTIPLY-ADD OPERATIONS OF BINARY NUMBERS IN AN ARITHMETIC UNIT

COMBINING OF SEVERAL EXECUTION UNITS TO COMPUTE A SINGLE WIDE SCALA...

COMPUTING AND SUMMING UP MULTIPLE PRODUCTS IN A SINGLE MULTIPLIER

BINARY FUSED MULTIPLY-ADD FLOATING-POINT CALCULATIONS

BINARY FUSED MULTIPLY-ADD FLOATING-POINT CALCULATIONS

USING ERROR CORRECTING CODES FOR PARITY PURPOSES

NON-LOCAL ERROR DETECTION IN PROCESSOR SYSTEMS