Michael Leonard Golden

Person

Mountain View, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Hierarchical asymmetric core attribute detection
- Patent number 12,056,522
- Issue date Aug 6, 2024
- Advanced Micro Devices, Inc.
- Michael L. Golden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for managing register free lists
- Patent number 11,907,070
- Issue date Feb 20, 2024
- Advanced Micro Devices, Inc.
- Eric Busta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for controlling electrical current supply in a mu...
- Patent number 11,853,111
- Issue date Dec 26, 2023
- Advanced Micro Devices, Inc.
- Amitabh Mehra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Retaining cache entries of a processor core during a powered-down s...
- Patent number 11,704,248
- Issue date Jul 18, 2023
- Advanced Micro Devices, Inc.
- William L. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for controlling electrical current supply in a mu...
- Patent number 11,460,879
- Issue date Oct 4, 2022
- Advanced Micro Devices, Inc.
- Amitabh Mehra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Retaining cache entries of a processor core during a powered-down s...
- Patent number 10,956,332
- Issue date Mar 23, 2021
- Advanced Micro Devices, Inc.
- William L. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Replica path timing adjustment and normalization for adaptive volta...
- Patent number 9,575,553
- Issue date Feb 21, 2017
- Advanced Micro Devices, Inc.
- Seng Oon Toh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable processing node including first and second processor...
- Patent number 7,472,224
- Issue date Dec 30, 2008
- Advanced Micro Devices, Inc.
- Richard E. Klass
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic reconfiguration of cache memory
- Patent number 7,257,678
- Issue date Aug 14, 2007
- Advanced Micro Devices, Inc.
- Michael L. Golden
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
HIERARCHICAL ASYMMETRIC CORE ATTRIBUTE DETECTION
- Publication number 20250021379
- Publication date Jan 16, 2025
- ADVANCED MICRO DEVICES, INC.
- Michael L. Golden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PEAK ELECTRICAL CURRENT CONTROL OF SOC OR APU WITH MULTIPLE PROCESS...
- Publication number 20230205304
- Publication date Jun 29, 2023
- ADVANCED MICRO DEVICES, INC.
- Xiuting C. Man
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIERARCHICAL ASYMMETRIC CORE ATTRIBUTE DETECTION
- Publication number 20230161618
- Publication date May 25, 2023
- ADVANCED MICRO DEVICES, INC.
- Michael L. Golden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR MANAGING REGISTER FREE LISTS
- Publication number 20230032375
- Publication date Feb 2, 2023
- ADVANCED MICRO DEVICES, INC.
- Eric Busta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR CONTROLLILNG ELECTRICAL CURRENT SUPPLY IN A M...
- Publication number 20230004185
- Publication date Jan 5, 2023
- ADVANCED MICRO DEVICES, INC.
- AMITABH MEHRA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR CONTROLLING POWER CONSUMPTION IN PROCESSOR US...
- Publication number 20220413584
- Publication date Dec 29, 2022
- ADVANCED MICRO DEVICES, INC.
- Richard Martin Born
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RETAINING CACHE ENTRIES OF A PROCESSOR CORE DURING A POWERED-DOWN S...
- Publication number 20210056031
- Publication date Feb 25, 2021
- ADVANCED MICRO DEVICES, INC.
- William L. WALKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RETAINING CACHE ENTRIES OF A PROCESSOR CORE DURING A POWERED-DOWN S...
- Publication number 20190129853
- Publication date May 2, 2019
- Advanced Micro Devices, Inc.
- William L. WALKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REPLICA PATH TIMING ADJUSTMENT AND NORMALIZATION FOR ADAPTIVE VOLTA...
- Publication number 20160179186
- Publication date Jun 23, 2016
- Advanced Micro Devices, Inc.
- Seng Oon Toh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-ISSUE UNIFIED INTEGER SCHEDULER
- Publication number 20120144393
- Publication date Jun 7, 2012
- Advanced Micro Devices, Inc.
- James Vinh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamic reconfiguration of cache memory
- Publication number 20060075192
- Publication date Apr 6, 2006
- Advanced Micro Devices, Inc.
- Michael L. Golden
- G06 - COMPUTING CALCULATING COUNTING

Michael Leonard Golden

Person

Patents Grantslast 30 patents

Hierarchical asymmetric core attribute detection

Methods and apparatus for managing register free lists

System and method for controlling electrical current supply in a mu...

Retaining cache entries of a processor core during a powered-down s...

System and method for controlling electrical current supply in a mu...

Retaining cache entries of a processor core during a powered-down s...

Replica path timing adjustment and normalization for adaptive volta...

Reconfigurable processing node including first and second processor...

Dynamic reconfiguration of cache memory

Patents Applicationslast 30 patents

HIERARCHICAL ASYMMETRIC CORE ATTRIBUTE DETECTION

PEAK ELECTRICAL CURRENT CONTROL OF SOC OR APU WITH MULTIPLE PROCESS...

HIERARCHICAL ASYMMETRIC CORE ATTRIBUTE DETECTION

METHODS AND APPARATUS FOR MANAGING REGISTER FREE LISTS

SYSTEM AND METHOD FOR CONTROLLILNG ELECTRICAL CURRENT SUPPLY IN A M...

SYSTEM AND METHOD FOR CONTROLLING POWER CONSUMPTION IN PROCESSOR US...

RETAINING CACHE ENTRIES OF A PROCESSOR CORE DURING A POWERED-DOWN S...

RETAINING CACHE ENTRIES OF A PROCESSOR CORE DURING A POWERED-DOWN S...

REPLICA PATH TIMING ADJUSTMENT AND NORMALIZATION FOR ADAPTIVE VOLTA...

MULTI-ISSUE UNIFIED INTEGER SCHEDULER

Dynamic reconfiguration of cache memory