Michael Longwell

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for error detection and correction
- Patent number 7,644,348
- Issue date Jan 5, 2010
- Madrone Solutions, Inc
- Michael L. Longwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controlling signal states and leakage current during a sleep mode
- Patent number 7,417,481
- Issue date Aug 26, 2008
- Intel Corporation
- Zahid Ahsanullah
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for error detection and correction
- Patent number 7,134,069
- Issue date Nov 7, 2006
- Madrone Solutions, Inc
- Michael L. Longwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controlling signal states and leakage current during a sleep mode
- Patent number 6,882,200
- Issue date Apr 19, 2005
- Intel Corporation
- Zahid Ahsanullah
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus for operating an integrated circuit having a sleep mode
- Patent number 6,646,941
- Issue date Nov 11, 2003
- Madrone Solutions, Inc.
- William Daune Atwell
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for apparatus for tracking errors in a memory system
- Patent number 6,560,725
- Issue date May 6, 2003
- Madrone Solutions, Inc.
- Michael L. Longwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory tile for use in a tiled memory
- Patent number 6,552,947
- Issue date Apr 22, 2003
- Madrone Solutions, Inc.
- Michael L. Longwell
- G11 - INFORMATION STORAGE
Information Patent Grant
Tiled memory and memory tile for use therein
- Patent number 6,477,104
- Issue date Nov 5, 2002
- Madrone Solutions, Inc.
- William Daune Atwell
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for operating an integrated circuit having a sleep mode
- Patent number 6,385,113
- Issue date May 7, 2002
- Madrone Solutions, Inc
- Michael L. Longwell
- G11 - INFORMATION STORAGE
Information Patent Grant
Distributed charge source
- Patent number 6,272,670
- Issue date Aug 7, 2001
- Madrone Solutions, Inc.
- Jeffrey Van Myers
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for designing a tiled memory
- Patent number 6,249,475
- Issue date Jun 19, 2001
- Madrone Solutions, Inc.
- William Daune Atwell
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for designing a memory tile for use in a tiled memory
- Patent number 6,154,413
- Issue date Nov 28, 2000
- Michael L. Longwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital computer having a system for sequentially refreshing an exp...
- Patent number 5,959,923
- Issue date Sep 28, 1999
- Dell U.S.A., L.P.
- Keith D. Matteson
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for precharging bus conductors to minimize bot...
- Patent number 5,646,556
- Issue date Jul 8, 1997
- Advanced Micro Devices, Inc.
- Michael L. Longwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital computer having an error correction code (ECC) system with...
- Patent number 5,598,422
- Issue date Jan 28, 1997
- Dell USA, L.P.
- Michael L. Longwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Highly stable asymmetric SRAM cell
- Patent number 5,363,328
- Issue date Nov 8, 1994
- Motorola Inc.
- Clyde H. Browning
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus for queing and storing data writes into valid word patterns
- Patent number 5,357,622
- Issue date Oct 18, 1994
- Dell USA, L.P.
- Terry J. Parks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction code pipeline for interleaved memory system
- Patent number 5,335,234
- Issue date Aug 2, 1994
- Dell USA, L.P.
- Keith D. Matteson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual path memory retrieval system for an interleaved dynamic RAM me...
- Patent number 5,261,068
- Issue date Nov 9, 1993
- Dell USA L.P.
- Darius D. Gaskins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-chip integrated circuit speed selection
- Patent number 5,099,196
- Issue date Mar 24, 1992
- Dell USA Corporation
- Michael L. Longwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power supply decoupling mechanism for integrated circuits
- Patent number 4,982,120
- Issue date Jan 1, 1991
- Dell Corporate Services Corporation
- Michael L. Longwell
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Interlocked state machines
- Patent number 4,749,929
- Issue date Jun 7, 1988
- Motorola, Inc.
- William D. Atwell
- G05 - CONTROLLING REGULATING

Patents Applicationslast 30 patents

Information Patent Application
Method and apparatus for error detection and correction
- Publication number 20100083065
- Publication date Apr 1, 2010
- Madrone Solutions, Inc.
- Michael L. Longwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for error detection and correction
- Publication number 20070214403
- Publication date Sep 13, 2007
- Madrone Solutions, Inc.
- Michael L. Longwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Controlling signal states and leakage current during a sleep mode
- Publication number 20050083103
- Publication date Apr 21, 2005
- Zahid Ahsanullah
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Controlling signal states and leakage current during a sleep mode
- Publication number 20050052206
- Publication date Mar 10, 2005
- Zahid Ahsanullah
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method for apparatus for tracking errors in a memory system
- Publication number 20030135794
- Publication date Jul 17, 2003
- Michael L. Longwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Controlling signal states and leakage current during a sleep mode
- Publication number 20030016062
- Publication date Jan 23, 2003
- Zahid Ahsanullah
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MEMORY TILE FOR USE IN A TILED MEMORY
- Publication number 20010014039
- Publication date Aug 16, 2001
- MICHAEL L. LONGWELL
- G11 - INFORMATION STORAGE

Michael Longwell

Person

Patents Grantslast 30 patents

Method and apparatus for error detection and correction

Controlling signal states and leakage current during a sleep mode

Method and apparatus for error detection and correction

Controlling signal states and leakage current during a sleep mode

Apparatus for operating an integrated circuit having a sleep mode

Method for apparatus for tracking errors in a memory system

Memory tile for use in a tiled memory

Tiled memory and memory tile for use therein

Method for operating an integrated circuit having a sleep mode

Distributed charge source

Method for designing a tiled memory

Method for designing a memory tile for use in a tiled memory

Digital computer having a system for sequentially refreshing an exp...

Apparatus and method for precharging bus conductors to minimize bot...

Digital computer having an error correction code (ECC) system with...

Highly stable asymmetric SRAM cell

Apparatus for queing and storing data writes into valid word patterns

Error correction code pipeline for interleaved memory system

Dual path memory retrieval system for an interleaved dynamic RAM me...

On-chip integrated circuit speed selection

Power supply decoupling mechanism for integrated circuits

Interlocked state machines

Patents Applicationslast 30 patents

Method and apparatus for error detection and correction

Method and apparatus for error detection and correction

Controlling signal states and leakage current during a sleep mode

Controlling signal states and leakage current during a sleep mode

Method for apparatus for tracking errors in a memory system

Controlling signal states and leakage current during a sleep mode

MEMORY TILE FOR USE IN A TILED MEMORY