Michael N. Dillon

Person

Richfield, MN, US

People

Patents Grantslast 30 patents

Information Patent Grant
Basic cell architecture for structured ASICs
- Patent number 8,429,586
- Issue date Apr 23, 2013
- LSI Corporation
- Ramnath Venkatraman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Basic cell architecture for structured application-specific integra...
- Patent number 8,166,440
- Issue date Apr 24, 2012
- LSI Corporation
- Ramnath Venkatraman
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Latch-based random access memory
- Patent number 7,800,936
- Issue date Sep 21, 2010
- LSI Logic Corporation
- Michael Norris Dillon
- G11 - INFORMATION STORAGE
Information Patent Grant
Enhanced power distribution in an integrated circuit
- Patent number 7,760,578
- Issue date Jul 20, 2010
- LSI Logic Corporation
- David Vinke
- G11 - INFORMATION STORAGE
Information Patent Grant
Basic cell architecture for structured application-specific integra...
- Patent number 7,404,154
- Issue date Jul 22, 2008
- LSI Corporation
- Ramnath Venkatraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for mapping logical components to physical locati...
- Patent number 7,269,803
- Issue date Sep 11, 2007
- LSI Corporation
- Khosro Khakzadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Latch-based random access memory (LBRAM) with tri-state banking and...
- Patent number 7,233,540
- Issue date Jun 19, 2007
- LSI Corporation
- David Vinke
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for use of hidden decoupling capacitors in an...
- Patent number 7,231,625
- Issue date Jun 12, 2007
- LSI Corporation
- Michael N. Dillon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Process for designing base platforms for IC design to permit resour...
- Patent number 7,216,323
- Issue date May 8, 2007
- LSI Logic Corporation
- Michael N. Dillon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit having voltage-down circuit regula...
- Patent number 6,934,171
- Issue date Aug 23, 2005
- LSI Logic Corporation
- Michael N. Dillon
- G05 - CONTROLLING REGULATING
Information Patent Grant
Reconfigurable memory architecture
- Patent number 6,864,716
- Issue date Mar 8, 2005
- LSI Logic Corporation
- Carl Anthony Monzel, III
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiple-bit memory latch cell for integrated circuit gate array
- Patent number 6,800,882
- Issue date Oct 5, 2004
- LSI Logic Corporation
- Michael N. Dillon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of using filler metal for implementing changes in an integra...
- Patent number 6,748,579
- Issue date Jun 8, 2004
- LSI Logic Corporation
- Michael N. Dillon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method to reduce power bus transients in synchronous integrated cir...
- Patent number 6,559,701
- Issue date May 6, 2003
- LSI Logic Corporation
- Michael N. Dillon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Standard cell integrated circuit layout definition having functiona...
- Patent number 6,093,214
- Issue date Jul 25, 2000
- LSI Logic Corporation
- Michael N. Dillon
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Basic Cell Architecture For Structured ASICs
- Publication number 20120175683
- Publication date Jul 12, 2012
- LSI Corporation
- Ramnath Venkatraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enhanced Power Distribution in an Integrated Circuit
- Publication number 20100097875
- Publication date Apr 22, 2010
- David Vinke
- G11 - INFORMATION STORAGE
Information Patent Application
Latch-based Random Access Memory
- Publication number 20100002526
- Publication date Jan 7, 2010
- LSI Corporation
- Michael Norris Dillon
- G11 - INFORMATION STORAGE
Information Patent Application
Process for designing base platforms for IC design to permit resour...
- Publication number 20060095880
- Publication date May 4, 2006
- LSI Logic Corporation
- Michael N. Dillon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for use of hidden decoupling capacitors in an...
- Publication number 20060075369
- Publication date Apr 6, 2006
- LSI Logic Corporation
- Michael N. Dillon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for mapping logical components to physical locati...
- Publication number 20050138595
- Publication date Jun 23, 2005
- LSI Logic Corporation
- Khosro Khakzadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Chip design command processor
- Publication number 20050114818
- Publication date May 26, 2005
- LSI Logic Corporation
- Khosro Khakzadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor integrated circuit having voltage-down circuit regula...
- Publication number 20050068014
- Publication date Mar 31, 2005
- LSI Logic Corporation
- Michael N. Dillon
- G05 - CONTROLLING REGULATING
Information Patent Application
Reconfigurable memory architecture
- Publication number 20040246023
- Publication date Dec 9, 2004
- Carl Anthony Monzel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MULTIPLE-BIT MEMORY LATCH CELL FOR INTEGRATED CIRCUIT GATE ARRAY
- Publication number 20040169205
- Publication date Sep 2, 2004
- Michael N. Dillon
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD OF USING FILLLER METAL FOR IMPLEMENTING CHANGES IN AN INTEGR...
- Publication number 20040044983
- Publication date Mar 4, 2004
- Michael N. Dillon
- G06 - COMPUTING CALCULATING COUNTING

Michael N. Dillon

Person

Patents Grantslast 30 patents

Basic cell architecture for structured ASICs

Basic cell architecture for structured application-specific integra...

Latch-based random access memory

Enhanced power distribution in an integrated circuit

Basic cell architecture for structured application-specific integra...

System and method for mapping logical components to physical locati...

Latch-based random access memory (LBRAM) with tri-state banking and...

Method and apparatus for use of hidden decoupling capacitors in an...

Process for designing base platforms for IC design to permit resour...

Semiconductor integrated circuit having voltage-down circuit regula...

Reconfigurable memory architecture

Multiple-bit memory latch cell for integrated circuit gate array

Method of using filler metal for implementing changes in an integra...

Method to reduce power bus transients in synchronous integrated cir...

Standard cell integrated circuit layout definition having functiona...

Patents Applicationslast 30 patents

Basic Cell Architecture For Structured ASICs

Enhanced Power Distribution in an Integrated Circuit

Latch-based Random Access Memory

Process for designing base platforms for IC design to permit resour...

Method and apparatus for use of hidden decoupling capacitors in an...

System and method for mapping logical components to physical locati...

Chip design command processor

Semiconductor integrated circuit having voltage-down circuit regula...

Reconfigurable memory architecture

MULTIPLE-BIT MEMORY LATCH CELL FOR INTEGRATED CIRCUIT GATE ARRAY

METHOD OF USING FILLLER METAL FOR IMPLEMENTING CHANGES IN AN INTEGR...