Michael Richard Spica

Person

Eagle, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Intelligent memory device test rack
- Patent number 12,142,336
- Issue date Nov 12, 2024
- Micron Technology, Inc.
- Gary D. Hamor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test access port architecture to facilitate multiple testing modes
- Patent number 12,057,183
- Issue date Aug 6, 2024
- Micron Technology, Inc.
- Michael Richard Spica
- G11 - INFORMATION STORAGE
Information Patent Grant
Using a thermoelectric component to improve memory sub-system perfo...
- Patent number 12,013,734
- Issue date Jun 18, 2024
- Micron Technology, Inc.
- Michael R. Spica
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power management component for memory sub-system voltage regulation
- Patent number 11,960,349
- Issue date Apr 16, 2024
- Micron Technology, Inc.
- Michael R. Spica
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device test mode access
- Patent number 11,854,637
- Issue date Dec 26, 2023
- Micron Technology, Inc.
- Michael R. Spica
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data logging sub-system for memory sub-system controller
- Patent number 11,726,698
- Issue date Aug 15, 2023
- Micron Technology, Inc.
- Michael Richard Spica
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dedicated design for testability paths for memory sub-system contro...
- Patent number 11,675,542
- Issue date Jun 13, 2023
- Micron Technology, Inc.
- Michael Richard Spica
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controller structural testing with automated test vectors
- Patent number 11,598,808
- Issue date Mar 7, 2023
- Micron Technology, Inc.
- Michael Richard Spica
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device test mode access
- Patent number 11,581,053
- Issue date Feb 14, 2023
- Micron Technology, Inc.
- Michael R. Spica
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data logging sub-system for memory sub-system controller
- Patent number 11,520,517
- Issue date Dec 6, 2022
- Micron Technology, Inc.
- Michael Richard Spica
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power management component for memory sub-system voltage regulation
- Patent number 11,474,888
- Issue date Oct 18, 2022
- Micron Technology, Inc.
- Michael R. Spica
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using a thermoelectric component to improve memory sub-system perfo...
- Patent number 11,416,048
- Issue date Aug 16, 2022
- Micron Technology, Inc.
- Michael R. Spica
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Intelligent memory device test rack
- Patent number 11,328,789
- Issue date May 10, 2022
- Micron Technology, Inc.
- Gary D. Hamor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test access port architecture to facilitate multiple testing modes
- Patent number 11,250,928
- Issue date Feb 15, 2022
- Micron Technology, Inc.
- Michael Richard Spica
- G01 - MEASURING TESTING
Information Patent Grant
Dedicated design for testability paths for memory sub-system contro...
- Patent number 11,231,879
- Issue date Jan 25, 2022
- Micron Technology, Inc.
- Michael Richard Spica
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controller accessible test access port controls
- Patent number 11,209,483
- Issue date Dec 28, 2021
- Micron Technology, Inc.
- Michael Richard Spica
- G01 - MEASURING TESTING
Information Patent Grant
Power management component for memory sub-system voltage regulation
- Patent number 10,983,852
- Issue date Apr 20, 2021
- Micron Technology, Inc.
- Michael R. Spica
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controller structural testing with automated test vectors
- Patent number 10,976,367
- Issue date Apr 13, 2021
- Micron Technology, Inc.
- Michael Richard Spica
- G11 - INFORMATION STORAGE
Information Patent Grant
Test access port architecture to facilitate multiple testing modes
- Patent number 10,867,689
- Issue date Dec 15, 2020
- Micron Technology, Inc.
- Michael Richard Spica
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM ACCESS BOUNDARY SCAN VIA SYSTEM SIDEBAND SIGNAL CONNECTIONS
- Publication number 20240288497
- Publication date Aug 29, 2024
- Micron Technology, Inc.
- Michael Richard Spica
- G01 - MEASURING TESTING
Information Patent Application
MEMORY DEVICE TEST MODE ACCESS
- Publication number 20230178163
- Publication date Jun 8, 2023
- Micron Technology, Inc.
- Michael R. Spica
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA LOGGING SUB-SYSTEM FOR MEMORY SUB-SYSTEM CONTROLLER
- Publication number 20230090519
- Publication date Mar 23, 2023
- Micron Technology, Inc.
- Michael Richard Spica
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER MANAGEMENT COMPONENT FOR MEMORY SUB-SYSTEM VOLTAGE REGULATION
- Publication number 20230025355
- Publication date Jan 26, 2023
- Micron Technology, Inc.
- Michael R. Spica
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USING A THERMOELECTRIC COMPONENT TO IMPROVE MEMORY SUB-SYSTEM PERFO...
- Publication number 20220382348
- Publication date Dec 1, 2022
- Micron Technology, Inc.
- Michael R. Spica
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTELLIGENT MEMORY DEVICE TEST RACK
- Publication number 20220230700
- Publication date Jul 21, 2022
- Micron Technology, Inc.
- Gary D. Hamor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEST ACCESS PORT ARCHITECTURE TO FACILITATE MULTIPLE TESTING MODES
- Publication number 20220130483
- Publication date Apr 28, 2022
- Micron Technology, Inc.
- Michael Richard Spica
- G01 - MEASURING TESTING
Information Patent Application
DEDICATED DESIGN FOR TESTABILITY PATHS FOR MEMORY SUB-SYSTEM CONTRO...
- Publication number 20220100430
- Publication date Mar 31, 2022
- Micron Technology, Inc.
- Michael Richard Spica
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE TEST MODE ACCESS
- Publication number 20220044750
- Publication date Feb 10, 2022
- Micron Technology, Inc.
- Michael R. Spica
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEDICATED DESIGN FOR TESTABILITY PATHS FOR MEMORY SUB-SYSTEM CONTRO...
- Publication number 20210271414
- Publication date Sep 2, 2021
- Micron Technology, Inc.
- Michael Richard Spica
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROLLER ACCESSIBLE TEST ACCESS PORT CONTROLS
- Publication number 20210270894
- Publication date Sep 2, 2021
- Micron Technology, Inc.
- Michael Richard Spica
- G01 - MEASURING TESTING
Information Patent Application
DATA LOGGING SUB-SYSTEM FOR MEMORY SUB-SYSTEM CONTROLLER
- Publication number 20210271408
- Publication date Sep 2, 2021
- Micron Technology, Inc.
- Michael Richard Spica
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER MANAGEMENT COMPONENT FOR MEMORY SUB-SYSTEM VOLTAGE REGULATION
- Publication number 20210224147
- Publication date Jul 22, 2021
- Micron Technology, Inc.
- Michael R. Spica
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROLLER STRUCTURAL TESTING WITH AUTOMATED TEST VECTORS
- Publication number 20210208199
- Publication date Jul 8, 2021
- Micron Technology, Inc.
- Michael Richard Spica
- G01 - MEASURING TESTING
Information Patent Application
INTELLIGENT MEMORY DEVICE TEST RACK
- Publication number 20210193250
- Publication date Jun 24, 2021
- Micron Technology, Inc.
- Gary D. Hamor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEST ACCESS PORT ARCHITECTURE TO FACILITATE MULTIPLE TESTING MODES
- Publication number 20210104290
- Publication date Apr 8, 2021
- Micron Technology, Inc.
- Michael Richard Spica
- G01 - MEASURING TESTING
Information Patent Application
USING A THERMOELECTRIC COMPONENT TO IMPROVE MEMORY SUB-SYSTEM PERFO...
- Publication number 20210026425
- Publication date Jan 28, 2021
- Micron Technology, Inc.
- Michael R. Spica
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEST ACCESS PORT ARCHITECTURE TO FACILITATE MULTIPLE TESTING MODES
- Publication number 20200258590
- Publication date Aug 13, 2020
- Micron Technology, Inc.
- Michael Richard Spica
- G11 - INFORMATION STORAGE
Information Patent Application
POWER MANAGEMENT COMPONENT FOR MEMORY SUB-SYSTEM VOLTAGE REGULATION
- Publication number 20200243119
- Publication date Jul 30, 2020
- Micron Technology, Inc.
- Michael R. Spica
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROLLER STRUCTURAL TESTING WITH AUTOMATED TEST VECTORS
- Publication number 20200191869
- Publication date Jun 18, 2020
- Micron Technology, Inc.
- Michael Richard Spica
- G01 - MEASURING TESTING

Michael Richard Spica

Person

Patents Grantslast 30 patents

Intelligent memory device test rack

Test access port architecture to facilitate multiple testing modes

Using a thermoelectric component to improve memory sub-system perfo...

Power management component for memory sub-system voltage regulation

Memory device test mode access

Data logging sub-system for memory sub-system controller

Dedicated design for testability paths for memory sub-system contro...

Controller structural testing with automated test vectors

Memory device test mode access

Data logging sub-system for memory sub-system controller

Power management component for memory sub-system voltage regulation

Using a thermoelectric component to improve memory sub-system perfo...

Intelligent memory device test rack

Test access port architecture to facilitate multiple testing modes

Dedicated design for testability paths for memory sub-system contro...

Controller accessible test access port controls

Power management component for memory sub-system voltage regulation

Controller structural testing with automated test vectors

Test access port architecture to facilitate multiple testing modes

Patents Applicationslast 30 patents

SYSTEM ACCESS BOUNDARY SCAN VIA SYSTEM SIDEBAND SIGNAL CONNECTIONS

MEMORY DEVICE TEST MODE ACCESS

DATA LOGGING SUB-SYSTEM FOR MEMORY SUB-SYSTEM CONTROLLER

POWER MANAGEMENT COMPONENT FOR MEMORY SUB-SYSTEM VOLTAGE REGULATION

USING A THERMOELECTRIC COMPONENT TO IMPROVE MEMORY SUB-SYSTEM PERFO...

INTELLIGENT MEMORY DEVICE TEST RACK

TEST ACCESS PORT ARCHITECTURE TO FACILITATE MULTIPLE TESTING MODES

DEDICATED DESIGN FOR TESTABILITY PATHS FOR MEMORY SUB-SYSTEM CONTRO...

MEMORY DEVICE TEST MODE ACCESS

DEDICATED DESIGN FOR TESTABILITY PATHS FOR MEMORY SUB-SYSTEM CONTRO...

CONTROLLER ACCESSIBLE TEST ACCESS PORT CONTROLS

DATA LOGGING SUB-SYSTEM FOR MEMORY SUB-SYSTEM CONTROLLER

POWER MANAGEMENT COMPONENT FOR MEMORY SUB-SYSTEM VOLTAGE REGULATION

CONTROLLER STRUCTURAL TESTING WITH AUTOMATED TEST VECTORS

INTELLIGENT MEMORY DEVICE TEST RACK

TEST ACCESS PORT ARCHITECTURE TO FACILITATE MULTIPLE TESTING MODES

USING A THERMOELECTRIC COMPONENT TO IMPROVE MEMORY SUB-SYSTEM PERFO...

TEST ACCESS PORT ARCHITECTURE TO FACILITATE MULTIPLE TESTING MODES

POWER MANAGEMENT COMPONENT FOR MEMORY SUB-SYSTEM VOLTAGE REGULATION

CONTROLLER STRUCTURAL TESTING WITH AUTOMATED TEST VECTORS