Michael S. Bertone

Person

Framingham, MA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Managing commit order for an external instruction relative to queue...
- Patent number 12,293,190
- Issue date May 6, 2025
- Marvell Asia Pte, Ltd.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Complex I/O value prediction for multiple values with physical or v...
- Patent number 11,748,107
- Issue date Sep 5, 2023
- Marvell Asia Pte, Ltd.
- Jason D. Zebchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Complex I/O value prediction for multiple values with physical or v...
- Patent number 11,573,800
- Issue date Feb 7, 2023
- Marvell Asia Pte, Ltd.
- Jason D. Zebchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing load and store instructions for memory barrier handling
- Patent number 11,507,379
- Issue date Nov 22, 2022
- Marvell Asia Pte, Ltd.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing low-level instructions and core interactions in multi-core...
- Patent number 11,327,759
- Issue date May 10, 2022
- Marvell Asia Pte, Ltd.
- David Albert Carlson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing potential faults for speculative page table access
- Patent number 11,176,055
- Issue date Nov 16, 2021
- Marvell Asia Pte, Ltd.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing translation lookaside buffer entries based on associativit...
- Patent number 10,846,239
- Issue date Nov 24, 2020
- Marvell Asia Pte, Ltd.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing commit order for an external instruction relative to two u...
- Patent number 10,817,300
- Issue date Oct 27, 2020
- Marvell Asia Pte, Ltd.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Local instruction ordering based on memory domains
- Patent number 10,782,896
- Issue date Sep 22, 2020
- Marvell Asia Pte, Ltd.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing lock and unlock operations using operation prediction
- Patent number 10,599,430
- Issue date Mar 24, 2020
- Cavium, LLC
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Admission control for memory access requests
- Patent number 10,599,577
- Issue date Mar 24, 2020
- Cavium, LLC
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing lock and unlock operations using traffic prioritization
- Patent number 10,445,096
- Issue date Oct 15, 2019
- Cavium, LLC
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction ordering for in-progress operations
- Patent number 10,339,054
- Issue date Jul 2, 2019
- Cavium, LLC
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing fairness for lock and unlock operations using operation pr...
- Patent number 10,331,500
- Issue date Jun 25, 2019
- Cavium, LLC
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing lock and unlock operations using active spinning
- Patent number 10,248,420
- Issue date Apr 2, 2019
- Cavium, LLC
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing virtual-address caches for multiple memory page sizes
- Patent number 10,223,279
- Issue date Mar 5, 2019
- Cavium, LLC
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Local ordering of instructions in a computing system
- Patent number 10,216,430
- Issue date Feb 26, 2019
- Cavium, LLC
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Collapsed address translation with multiple page sizes
- Patent number 10,042,778
- Issue date Aug 7, 2018
- Cavium, Inc.
- Shubhendu S. Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction ordering for in-progress operations
- Patent number 9,910,776
- Issue date Mar 6, 2018
- Cavium, Inc.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packet traffic control in a network processor
- Patent number 9,906,468
- Issue date Feb 27, 2018
- Cavium, Inc.
- Richard E. Kessler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Managing translation invalidation
- Patent number 9,779,028
- Issue date Oct 3, 2017
- Cavium, Inc.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Input output value prediction with physical or virtual addressing f...
- Patent number 9,753,859
- Issue date Sep 5, 2017
- Cavium, Inc.
- Wilson Parkhurst Snyder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Translation lookaside buffer invalidation suppression
- Patent number 9,684,606
- Issue date Jun 20, 2017
- Cavium, Inc.
- Richard Eugene Kessler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Collapsed address translation with multiple page sizes
- Patent number 9,645,941
- Issue date May 9, 2017
- Cavium, Inc.
- Shubhendu S. Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Merged TLB structure for multiple sequential address translations
- Patent number 9,639,476
- Issue date May 2, 2017
- Cavium, Inc.
- Bryan W. Chin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Messaging with flexible transmit ordering
- Patent number 9,596,193
- Issue date Mar 14, 2017
- Cavium, Inc.
- Richard E. Kessler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for supporting wide operations using atomic se...
- Patent number 9,501,243
- Issue date Nov 22, 2016
- Cavium, Inc.
- Richard E. Kessler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Translation lookaside buffer management
- Patent number 9,501,425
- Issue date Nov 22, 2016
- Cavium, Inc.
- Shubhendu S. Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Caching TLB translations using a unified page table walker cache
- Patent number 9,405,702
- Issue date Aug 2, 2016
- Cavium, Inc.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for conditional storing of data using a compar...
- Patent number 9,390,023
- Issue date Jul 12, 2016
- Cavium, Inc.
- Richard E. Kessler
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Complex I/O Value Prediction for Multiple Values with Physical or V...
- Publication number 20230080128
- Publication date Mar 16, 2023
- Marvell Asia Pte, Ltd.
- Jason D. Zebchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Managing Commit Order for an External Instruction Relative to Queue...
- Publication number 20210011729
- Publication date Jan 14, 2021
- Marvell Asia Pte, Ltd.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Managing Load and Store Instructions for Memory Barrier Handling
- Publication number 20200379772
- Publication date Dec 3, 2020
- Marvell World Trade Ltd.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Managing Translation Lookaside Buffer Entries Based on Associativit...
- Publication number 20200174945
- Publication date Jun 4, 2020
- Marvell International Ltd.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING PIPELINE INSTRUCTION INSERTION FOR RECEIVED EXTERNAL INSTR...
- Publication number 20200133680
- Publication date Apr 30, 2020
- Marvell International Ltd.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING LOW-LEVEL INSTRUCTIONS AND CORE INTERACTIONS IN MULTI-CORE...
- Publication number 20200097292
- Publication date Mar 26, 2020
- Marvell International Ltd.
- David Albert Carlson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Complex I/O Value Prediction for Multiple Values with Physical or V...
- Publication number 20200012499
- Publication date Jan 9, 2020
- Jason D. Zebchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOCAL INSTRUCTION ORDERING BASED ON MEMORY DOMAINS
- Publication number 20190138232
- Publication date May 9, 2019
- Cavium, LLC
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING LOCK AND UNLOCK OPERATIONS USING TRAFFIC PRIORITIZATION
- Publication number 20180293100
- Publication date Oct 11, 2018
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING LOCK AND UNLOCK OPERATIONS USING OPERATION PREDICTION
- Publication number 20180293070
- Publication date Oct 11, 2018
- Cavium, Inc.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING LOCK AND UNLOCK OPERATIONS USING ACTIVE SPINNING
- Publication number 20180293113
- Publication date Oct 11, 2018
- Cavium, Inc.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING FAIRNESS FOR LOCK AND UNLOCK OPERATIONS USING OPERATION PR...
- Publication number 20180293114
- Publication date Oct 11, 2018
- Cavium, Inc.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION ORDERING FOR IN-PROGRESS OPERATIONS
- Publication number 20180165197
- Publication date Jun 14, 2018
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING VIRTUAL-ADDRESS CACHES FOR MULTIPLE MEMORY PAGE SIZES
- Publication number 20170371799
- Publication date Dec 28, 2017
- Cavium, Inc.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADMISSION CONTROL FOR MEMORY ACCESS REQUESTS
- Publication number 20170322886
- Publication date Nov 9, 2017
- Cavium, Inc.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING TRANSLATION INVALIDATION
- Publication number 20170286315
- Publication date Oct 5, 2017
- Cavium, Inc.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Collapsed Address Translation With Multiple Page Sizes
- Publication number 20170206171
- Publication date Jul 20, 2017
- Cavium, Inc.
- Shubhendu S. Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INPUT OUTPUT VALUE PREDICTION WITH PHYSICAL OR VIRTUAL ADDRESSING F...
- Publication number 20170097895
- Publication date Apr 6, 2017
- Cavium, Inc.
- Wilson Parkhurst Snyder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOCAL INSTRUCTION ORDERING
- Publication number 20170003905
- Publication date Jan 5, 2017
- Cavium, Inc.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION ORDERING FOR IN-PROGRESS OPERATIONS
- Publication number 20160140043
- Publication date May 19, 2016
- Cavium, Inc.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSLATION LOOKASIDE BUFFER INVALIDATION SUPPRESSION
- Publication number 20160140051
- Publication date May 19, 2016
- Cavium, Inc.
- Richard Eugene Kessler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSLATION LOOKASIDE BUFFER MANAGEMENT
- Publication number 20160140047
- Publication date May 19, 2016
- Cavium, Inc.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHING TLB TRANSLATIONS USING A UNIFIED PAGE TABLE WALKER CACHE
- Publication number 20160140048
- Publication date May 19, 2016
- Cavium, Inc.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MESSAGING WITH FLEXIBLE TRANSMIT ORDERING
- Publication number 20150288625
- Publication date Oct 8, 2015
- Cavium, Inc.
- Richard E. Kessler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR LOW LATENCY EXCHANGE OF DATA BETWEEN A PRO...
- Publication number 20150261535
- Publication date Sep 17, 2015
- Cavium, Inc.
- Wilson P. Snyder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRAM ADDRESS PROTECTION
- Publication number 20150169399
- Publication date Jun 18, 2015
- Cavium, Inc.
- Aseem Maheshwari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus to Represent a Processor Context with Fewer Bits
- Publication number 20150134931
- Publication date May 14, 2015
- Cavium, Inc.
- Shubhendu S. Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method And Apparatus For Conditional Storing Of Data Using A Compar...
- Publication number 20150100737
- Publication date Apr 9, 2015
- Cavium, Inc.
- Richard E. Kessler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method And Apparatus For Supporting Wide Operations Using Atomic Se...
- Publication number 20150100747
- Publication date Apr 9, 2015
- Cavium, Inc.
- Richard E. Kessler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Merged TLB Structure For Multiple Sequential Address Translations
- Publication number 20150089116
- Publication date Mar 26, 2015
- Cavium, Inc.
- Bryan W. Chin
- G06 - COMPUTING CALCULATING COUNTING

Michael S. Bertone

Person

Patents Grantslast 30 patents

Managing commit order for an external instruction relative to queue...

Complex I/O value prediction for multiple values with physical or v...

Complex I/O value prediction for multiple values with physical or v...

Managing load and store instructions for memory barrier handling

Managing low-level instructions and core interactions in multi-core...

Managing potential faults for speculative page table access

Managing translation lookaside buffer entries based on associativit...

Managing commit order for an external instruction relative to two u...

Local instruction ordering based on memory domains

Managing lock and unlock operations using operation prediction

Admission control for memory access requests

Managing lock and unlock operations using traffic prioritization

Instruction ordering for in-progress operations

Managing fairness for lock and unlock operations using operation pr...

Managing lock and unlock operations using active spinning

Managing virtual-address caches for multiple memory page sizes

Local ordering of instructions in a computing system

Collapsed address translation with multiple page sizes

Instruction ordering for in-progress operations

Packet traffic control in a network processor

Managing translation invalidation

Input output value prediction with physical or virtual addressing f...

Translation lookaside buffer invalidation suppression

Collapsed address translation with multiple page sizes

Merged TLB structure for multiple sequential address translations

Messaging with flexible transmit ordering

Method and apparatus for supporting wide operations using atomic se...

Translation lookaside buffer management

Caching TLB translations using a unified page table walker cache

Method and apparatus for conditional storing of data using a compar...

Patents Applicationslast 30 patents

Complex I/O Value Prediction for Multiple Values with Physical or V...

Managing Commit Order for an External Instruction Relative to Queue...

Managing Load and Store Instructions for Memory Barrier Handling

Managing Translation Lookaside Buffer Entries Based on Associativit...

MANAGING PIPELINE INSTRUCTION INSERTION FOR RECEIVED EXTERNAL INSTR...

MANAGING LOW-LEVEL INSTRUCTIONS AND CORE INTERACTIONS IN MULTI-CORE...

Complex I/O Value Prediction for Multiple Values with Physical or V...

LOCAL INSTRUCTION ORDERING BASED ON MEMORY DOMAINS

MANAGING LOCK AND UNLOCK OPERATIONS USING TRAFFIC PRIORITIZATION

MANAGING LOCK AND UNLOCK OPERATIONS USING OPERATION PREDICTION

MANAGING LOCK AND UNLOCK OPERATIONS USING ACTIVE SPINNING

MANAGING FAIRNESS FOR LOCK AND UNLOCK OPERATIONS USING OPERATION PR...

INSTRUCTION ORDERING FOR IN-PROGRESS OPERATIONS

MANAGING VIRTUAL-ADDRESS CACHES FOR MULTIPLE MEMORY PAGE SIZES

ADMISSION CONTROL FOR MEMORY ACCESS REQUESTS

MANAGING TRANSLATION INVALIDATION

Collapsed Address Translation With Multiple Page Sizes

INPUT OUTPUT VALUE PREDICTION WITH PHYSICAL OR VIRTUAL ADDRESSING F...

LOCAL INSTRUCTION ORDERING

INSTRUCTION ORDERING FOR IN-PROGRESS OPERATIONS

TRANSLATION LOOKASIDE BUFFER INVALIDATION SUPPRESSION

TRANSLATION LOOKASIDE BUFFER MANAGEMENT

CACHING TLB TRANSLATIONS USING A UNIFIED PAGE TABLE WALKER CACHE

MESSAGING WITH FLEXIBLE TRANSMIT ORDERING

METHOD AND APPARATUS FOR LOW LATENCY EXCHANGE OF DATA BETWEEN A PRO...

DRAM ADDRESS PROTECTION

Method and Apparatus to Represent a Processor Context with Fewer Bits

Method And Apparatus For Conditional Storing Of Data Using A Compar...

Method And Apparatus For Supporting Wide Operations Using Atomic Se...

Merged TLB Structure For Multiple Sequential Address Translations