Michael Sheperek

Person

Longmont, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Adjustment of a starting voltage corresponding to a program operati...
- Patent number 12,125,539
- Issue date Oct 22, 2024
- Micron Technology, Inc.
- Bruce A. Liikanen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adjustment of program verify targets corresponding to a last progra...
- Patent number 12,040,026
- Issue date Jul 16, 2024
- Micron Technology, Inc.
- Bruce A. Liikanen
- G11 - INFORMATION STORAGE
Information Patent Grant
Logic based read sample offset in a memory sub-system
- Patent number 11,983,065
- Issue date May 14, 2024
- Micron Technology, Inc.
- Bruce A. Liikanen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tracking and refreshing state metrics in memory sub-systems
- Patent number 11,955,194
- Issue date Apr 9, 2024
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Grant
Combination scan management for block families of a memory device
- Patent number 11,941,277
- Issue date Mar 26, 2024
- Micron Technology, Inc.
- Shane Nowell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Closing block family based on soft and hard closure criteria
- Patent number 11,940,892
- Issue date Mar 26, 2024
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error avoidance based on voltage distribution parameters of block f...
- Patent number 11,915,776
- Issue date Feb 27, 2024
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Grant
First-pass continuous read level calibration
- Patent number 11,908,536
- Issue date Feb 20, 2024
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Grant
Block family-based error avoidance for memory devices
- Patent number 11,886,726
- Issue date Jan 30, 2024
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determination of state metrics of memory sub-systems following powe...
- Patent number 11,862,274
- Issue date Jan 2, 2024
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Grant
Combining sets of memory blocks in a memory device
- Patent number 11,853,556
- Issue date Dec 26, 2023
- Micron Technology, Inc.
- Steven Michael Kientz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage bin boundary calibration at memory device power up
- Patent number 11,842,772
- Issue date Dec 12, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Open block family duration limited by temperature variation
- Patent number 11,842,061
- Issue date Dec 12, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage offset bin selection by die group for memory devices
- Patent number 11,837,291
- Issue date Dec 5, 2023
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating embedded data in memory cells in a memory sub-system
- Patent number 11,817,152
- Issue date Nov 14, 2023
- Micron Technology, Inc.
- Bruce A. Liikanen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data integrity checks based on voltage distribution metrics
- Patent number 11,810,631
- Issue date Nov 7, 2023
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G11 - INFORMATION STORAGE
Information Patent Grant
Threshold voltage offset bin selection based on die family in memor...
- Patent number 11,791,004
- Issue date Oct 17, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Grant
Estimation of read level thresholds using a data structure
- Patent number 11,789,640
- Issue date Oct 17, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage based combining of block families for memory devices
- Patent number 11,768,619
- Issue date Sep 26, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Block family combination and voltage bin selection
- Patent number 11,755,478
- Issue date Sep 12, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic program erase targeting with bit error rate
- Patent number 11,742,027
- Issue date Aug 29, 2023
- Micron Technology, Inc.
- Bruce A. Liikanen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reliability scan assisted voltage bin selection
- Patent number 11,733,896
- Issue date Aug 22, 2023
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error avoidance based on voltage distribution parameters of blocks
- Patent number 11,735,254
- Issue date Aug 22, 2023
- Micron Technology, Inc.
- Shane Nowell
- G11 - INFORMATION STORAGE
Information Patent Grant
Read sample offset bit determination in a memory sub-system
- Patent number 11,733,928
- Issue date Aug 22, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system with dynamic calibration using a variable adjustment...
- Patent number 11,733,929
- Issue date Aug 22, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Time-based combining for block families of a memory device
- Patent number 11,726,689
- Issue date Aug 15, 2023
- Micron Technology, Inc.
- Shane Nowell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performing threshold voltage offset bin selection by package for me...
- Patent number 11,727,994
- Issue date Aug 15, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system with dynamic calibration using a trim management mech...
- Patent number 11,721,399
- Issue date Aug 8, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Smart sampling for block family scan
- Patent number 11,721,409
- Issue date Aug 8, 2023
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic background scan optimization in a memory sub-system
- Patent number 11,714,580
- Issue date Aug 1, 2023
- Micron Technology, Inc.
- Gerald L. Cadloni
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
ADJUSTMENT OF PROGRAM VERIFY TARGETS CORRESPONDING TO A LAST PROGRA...
- Publication number 20240331780
- Publication date Oct 3, 2024
- Micron Technology, Inc.
- Bruce A. Liikanen
- G11 - INFORMATION STORAGE
Information Patent Application
TRACKING AND REFRESHING STATE METRICS IN MEMORY SUB-SYSTEMS
- Publication number 20240265989
- Publication date Aug 8, 2024
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Application
CLOSING BLOCK FAMILY BASED ON SOFT AND HARD CLOSURE CRITERIA
- Publication number 20240168670
- Publication date May 23, 2024
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BLOCK FAMILY-BASED ERROR AVOIDANCE FOR MEMORY DEVICES
- Publication number 20240111445
- Publication date Apr 4, 2024
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPEN BLOCK FAMILY DURATION LIMITED BY TEMPERATURE VARIATION
- Publication number 20240045605
- Publication date Feb 8, 2024
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA INTEGRITY CHECKS BASED ON VOLTAGE DISTRIBUTION METRICS
- Publication number 20240021258
- Publication date Jan 18, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G11 - INFORMATION STORAGE
Information Patent Application
TRACKING AND REFRESHING STATE METRICS IN MEMORY SUB-SYSTEMS
- Publication number 20230245708
- Publication date Aug 3, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Application
COMBINATION SCAN MANAGEMENT FOR BLOCK FAMILIES OF A MEMORY DEVICE
- Publication number 20230205442
- Publication date Jun 29, 2023
- Micron Technology, Inc.
- Shane Nowell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETERMINATION OF STATE METRICS OF MEMORY SUB-SYSTEMS FOLLOWING POWE...
- Publication number 20230207043
- Publication date Jun 29, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Application
OPEN BLOCK FAMILY DURATION LIMITED BY TIME AND TEMPERATURE
- Publication number 20230153003
- Publication date May 18, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THRESHOLD VOLTAGE OFFSET BIN SELECTION BASED ON DIE FAMILY IN MEMOR...
- Publication number 20230115960
- Publication date Apr 13, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Application
FIRST-PASS CONTINUOUS READ LEVEL CALIBRATION
- Publication number 20230054653
- Publication date Feb 23, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Application
ERROR AVOIDANCE BASED ON VOLTAGE DISTRIBUTION PARAMETERS OF BLOCK F...
- Publication number 20230012855
- Publication date Jan 19, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Application
GENERATING EMBEDDED DATA IN MEMORY CELLS IN A MEMORY SUB-SYSTEM
- Publication number 20220406381
- Publication date Dec 22, 2022
- Micron Technology, Inc.
- Bruce A. Liikanen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM WITH DYNAMIC CALIBRATION USING A VARIABLE ADJUSTMENT...
- Publication number 20220391143
- Publication date Dec 8, 2022
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SMART SAMPLING FOR BLOCK FAMILY SCAN
- Publication number 20220366997
- Publication date Nov 17, 2022
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC BACKGROUND SCAN OPTIMIZATION IN A MEMORY SUB-SYSTEM
- Publication number 20220350538
- Publication date Nov 3, 2022
- Micron Technology, Inc.
- Gerald L. Cadloni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VOLTAGE BASED COMBINING OF BLOCK FAMILIES FOR MEMORY DEVICES
- Publication number 20220350488
- Publication date Nov 3, 2022
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOSING BLOCK FAMILY BASED ON SOFT AND HARD CLOSURE CRITERIA
- Publication number 20220350718
- Publication date Nov 3, 2022
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADJUSTMENT OF A STARTING VOLTAGE CORRESPONDING TO A PROGRAM OPERATI...
- Publication number 20220343981
- Publication date Oct 27, 2022
- Micron Technology, Inc.
- Bruce A. Liikanen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASSOCIATING MULTIPLE CURSORS WITH BLOCK FAMILY OF MEMORY DEVICE
- Publication number 20220334721
- Publication date Oct 20, 2022
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VOLTAGE BIN BOUNDARY CALIBRATION AT MEMORY DEVICE POWER UP
- Publication number 20220336021
- Publication date Oct 20, 2022
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR AVOIDANCE BASED ON VOLTAGE DISTRIBUTION PARAMETERS OF BLOCKS
- Publication number 20220319589
- Publication date Oct 6, 2022
- Micron Technology, Inc.
- Shane Nowell
- G11 - INFORMATION STORAGE
Information Patent Application
ERROR AVOIDANCE BASED ON VOLTAGE DISTRIBUTION PARAMETERS OF BLOCK F...
- Publication number 20220319630
- Publication date Oct 6, 2022
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Application
COMBINING SETS OF MEMORY BLOCKS IN A MEMORY DEVICE
- Publication number 20220300166
- Publication date Sep 22, 2022
- Micron Technology, Inc.
- Steven Michael Kientz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC PROGRAM ERASE TARGETING WITH BIT ERROR RATE
- Publication number 20220284967
- Publication date Sep 8, 2022
- Micron Technology, Inc.
- Bruce A. Liikanen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RELIABILITY SCAN ASSISTED VOLTAGE BIN SELECTION
- Publication number 20220276784
- Publication date Sep 1, 2022
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR AVOIDANCE BASED ON VOLTAGE DISTRIBUTION PARAMETERS
- Publication number 20220246207
- Publication date Aug 4, 2022
- Micron Technology, Inc.
- Shane Nowell
- G11 - INFORMATION STORAGE
Information Patent Application
CHARGE LOSS SCAN OPERATION MANAGEMENT IN MEMORY DEVICES
- Publication number 20220237094
- Publication date Jul 28, 2022
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
READ SAMPLE OFFSET BIT DETERMINATION IN A MEMORY SUB-SYSTEM
- Publication number 20220214837
- Publication date Jul 7, 2022
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING

Michael Sheperek

Person

Patents Grantslast 30 patents

Adjustment of a starting voltage corresponding to a program operati...

Adjustment of program verify targets corresponding to a last progra...

Logic based read sample offset in a memory sub-system

Tracking and refreshing state metrics in memory sub-systems

Combination scan management for block families of a memory device

Closing block family based on soft and hard closure criteria

Error avoidance based on voltage distribution parameters of block f...

First-pass continuous read level calibration

Block family-based error avoidance for memory devices

Determination of state metrics of memory sub-systems following powe...

Combining sets of memory blocks in a memory device

Voltage bin boundary calibration at memory device power up

Open block family duration limited by temperature variation

Voltage offset bin selection by die group for memory devices

Generating embedded data in memory cells in a memory sub-system

Data integrity checks based on voltage distribution metrics

Threshold voltage offset bin selection based on die family in memor...

Estimation of read level thresholds using a data structure

Voltage based combining of block families for memory devices

Block family combination and voltage bin selection

Dynamic program erase targeting with bit error rate

Reliability scan assisted voltage bin selection

Error avoidance based on voltage distribution parameters of blocks

Read sample offset bit determination in a memory sub-system

Memory system with dynamic calibration using a variable adjustment...

Time-based combining for block families of a memory device

Performing threshold voltage offset bin selection by package for me...

Memory system with dynamic calibration using a trim management mech...

Smart sampling for block family scan

Dynamic background scan optimization in a memory sub-system

Patents Applicationslast 30 patents

ADJUSTMENT OF PROGRAM VERIFY TARGETS CORRESPONDING TO A LAST PROGRA...

TRACKING AND REFRESHING STATE METRICS IN MEMORY SUB-SYSTEMS

CLOSING BLOCK FAMILY BASED ON SOFT AND HARD CLOSURE CRITERIA

BLOCK FAMILY-BASED ERROR AVOIDANCE FOR MEMORY DEVICES

OPEN BLOCK FAMILY DURATION LIMITED BY TEMPERATURE VARIATION

DATA INTEGRITY CHECKS BASED ON VOLTAGE DISTRIBUTION METRICS

TRACKING AND REFRESHING STATE METRICS IN MEMORY SUB-SYSTEMS

COMBINATION SCAN MANAGEMENT FOR BLOCK FAMILIES OF A MEMORY DEVICE

DETERMINATION OF STATE METRICS OF MEMORY SUB-SYSTEMS FOLLOWING POWE...

OPEN BLOCK FAMILY DURATION LIMITED BY TIME AND TEMPERATURE

THRESHOLD VOLTAGE OFFSET BIN SELECTION BASED ON DIE FAMILY IN MEMOR...

FIRST-PASS CONTINUOUS READ LEVEL CALIBRATION

ERROR AVOIDANCE BASED ON VOLTAGE DISTRIBUTION PARAMETERS OF BLOCK F...

GENERATING EMBEDDED DATA IN MEMORY CELLS IN A MEMORY SUB-SYSTEM

MEMORY SYSTEM WITH DYNAMIC CALIBRATION USING A VARIABLE ADJUSTMENT...

SMART SAMPLING FOR BLOCK FAMILY SCAN

DYNAMIC BACKGROUND SCAN OPTIMIZATION IN A MEMORY SUB-SYSTEM

VOLTAGE BASED COMBINING OF BLOCK FAMILIES FOR MEMORY DEVICES

CLOSING BLOCK FAMILY BASED ON SOFT AND HARD CLOSURE CRITERIA

ADJUSTMENT OF A STARTING VOLTAGE CORRESPONDING TO A PROGRAM OPERATI...

ASSOCIATING MULTIPLE CURSORS WITH BLOCK FAMILY OF MEMORY DEVICE

VOLTAGE BIN BOUNDARY CALIBRATION AT MEMORY DEVICE POWER UP

ERROR AVOIDANCE BASED ON VOLTAGE DISTRIBUTION PARAMETERS OF BLOCKS

ERROR AVOIDANCE BASED ON VOLTAGE DISTRIBUTION PARAMETERS OF BLOCK F...

COMBINING SETS OF MEMORY BLOCKS IN A MEMORY DEVICE

DYNAMIC PROGRAM ERASE TARGETING WITH BIT ERROR RATE

RELIABILITY SCAN ASSISTED VOLTAGE BIN SELECTION

ERROR AVOIDANCE BASED ON VOLTAGE DISTRIBUTION PARAMETERS

CHARGE LOSS SCAN OPERATION MANAGEMENT IN MEMORY DEVICES

READ SAMPLE OFFSET BIT DETERMINATION IN A MEMORY SUB-SYSTEM