Michael Y. Chan

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Sunnyvale, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Conductive micro LED architecture for on-wafer testing
- Patent number 11,404,601
- Issue date Aug 2, 2022
- Apple Inc.
- Ranjith Samuel E. John
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional stacked substrate arrangements
- Patent number 8,421,225
- Issue date Apr 16, 2013
- Intel Corporation
- Shriram Ramanathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional stacked substrate arrangements
- Patent number 8,203,208
- Issue date Jun 19, 2012
- Intel Corporation
- Shriram Ramanathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional stacked substrate arrangements
- Patent number 7,973,407
- Issue date Jul 5, 2011
- Intel Corporation
- Shriram Ramanathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonded wafer processing method
- Patent number 7,129,172
- Issue date Oct 31, 2006
- Intel Corporation
- Patrick Morrow
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Conductive Micro LED Architecture for On-Wafer Testing
- Publication number 20210091259
- Publication date Mar 25, 2021
- Apple Inc.
- Ranjith Samuel E. John
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL STACKED SUBSTRATE ARRANGEMENTS
- Publication number 20120280387
- Publication date Nov 8, 2012
- Shriram Ramanathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL STACKED SUBSTRATE ARRANGEMENTS
- Publication number 20110260319
- Publication date Oct 27, 2011
- Shriram Ramanathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Three-dimensional stacked substrate arrangements
- Publication number 20090174070
- Publication date Jul 9, 2009
- Shriram Ramanathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Bonded wafer processing method
- Publication number 20050215056
- Publication date Sep 29, 2005
- Patrick Morrow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Three-dimensional stacked substrate arrangements
- Publication number 20050003650
- Publication date Jan 6, 2005
- Shriram Ramanathan
- H01 - BASIC ELECTRIC ELEMENTS