Michelle C. Jen

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Recalibration of PHY circuitry for the PCI express (PIPE) interface...
- Patent number 11,789,892
- Issue date Oct 17, 2023
- Intel Corporation
- Michelle C. Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shared buffered memory routing
- Patent number 11,755,486
- Issue date Sep 12, 2023
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques to support multiple protocols between computer system in...
- Patent number 11,729,096
- Issue date Aug 15, 2023
- Intel Corporation
- Debendra Das Sharma
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Flex bus protocol negotiation and enabling sequence
- Patent number 11,726,939
- Issue date Aug 15, 2023
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enabling sync header suppression latency optimization in the presen...
- Patent number 11,669,481
- Issue date Jun 6, 2023
- Intel Corporation
- Michelle Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Recalibration of PHY circuitry for the PCI express (pipe) interface...
- Patent number 11,327,920
- Issue date May 10, 2022
- Intel Corporation
- Michelle C. Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enabling sync header suppression latency optimization in the presen...
- Patent number 11,232,058
- Issue date Jan 25, 2022
- Intel Corporation
- Michelle Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reduced pin count interface
- Patent number 11,163,717
- Issue date Nov 2, 2021
- Intel Corporation
- Michelle Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flex bus protocol negotiation and enabling sequence
- Patent number 11,144,492
- Issue date Oct 12, 2021
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shared buffered memory routing
- Patent number 11,113,196
- Issue date Sep 7, 2021
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques to support multiple protocols between computer system in...
- Patent number 11,095,556
- Issue date Aug 17, 2021
- Intel Corporation
- Debendra Das Sharma
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Sharing memory and I/O services between nodes
- Patent number 10,915,468
- Issue date Feb 9, 2021
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low latency retimer
- Patent number 10,747,688
- Issue date Aug 18, 2020
- Intel Corporation
- Michelle Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Recalibration of PHY circuitry for the PCI Express (PIPE) interface...
- Patent number 10,713,209
- Issue date Jul 14, 2020
- Intel Corporation
- Michelle C. Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reduced pin count interface
- Patent number 10,706,003
- Issue date Jul 7, 2020
- Intel Corporation
- Michelle Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flex bus protocol negotiation and enabling sequence
- Patent number 10,606,785
- Issue date Mar 31, 2020
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reduced pin count interface
- Patent number 10,198,394
- Issue date Feb 5, 2019
- Intel Corporation
- Michelle Jen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low power entry in a shared memory link
- Patent number 9,921,768
- Issue date Mar 20, 2018
- Intel Corporation
- Michelle C. Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physical interface for a serial interconnect
- Patent number 9,779,053
- Issue date Oct 3, 2017
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shared buffered memory routing
- Patent number 9,720,838
- Issue date Aug 1, 2017
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low-latency internode communication
- Patent number 9,665,415
- Issue date May 30, 2017
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Out-of-order servicing of read requests with minimal additional sto...
- Patent number 7,228,362
- Issue date Jun 5, 2007
- Intel Corporation
- Michelle C. Jen
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SHARING MEMORY AND I/O SERVICES BETWEEN NODES
- Publication number 20240160585
- Publication date May 16, 2024
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHARED BUFFERED MEMORY ROUTING
- Publication number 20240012759
- Publication date Jan 11, 2024
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTION OF PROCESSING MODE FOR RECEIVER CIRCUIT
- Publication number 20220308954
- Publication date Sep 29, 2022
- Intel Corporation
- Swadesh Choudhary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RECALIBRATION OF PHY CIRCUITRY FOR THE PCI EXPRESS (PIPE) INTERFAC...
- Publication number 20220269641
- Publication date Aug 25, 2022
- Intel Corporation
- Michelle C. Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enabling Sync Header Suppression Latency Optimization In The Presen...
- Publication number 20220114128
- Publication date Apr 14, 2022
- Intel Corporation
- Michelle Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALTERNATE PHYSICAL LAYER POWER MODE
- Publication number 20220011849
- Publication date Jan 13, 2022
- Intel Corporation
- Michelle C. Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLEX BUS PROTOCOL NEGOTIATION AND ENABLING SEQUENCE
- Publication number 20220012203
- Publication date Jan 13, 2022
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE LOGGING FOR LANE MARGINING AND CHARACTERIZATION
- Publication number 20220012140
- Publication date Jan 13, 2022
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHARING MEMORY AND I/O SERVICES BETWEEN NODES
- Publication number 20220012189
- Publication date Jan 13, 2022
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES TO SUPPORT MULTIPLE PROTOCOLS BETWEEN COMPUTER SYSTEM IN...
- Publication number 20210399982
- Publication date Dec 23, 2021
- Intel Corporation
- DEBENDRA DAS SHARMA
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SHARING MEMORY AND I/O SERVICES BETWEEN NODES
- Publication number 20210303482
- Publication date Sep 30, 2021
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHARED BUFFERED MEMORY ROUTING
- Publication number 20210240623
- Publication date Aug 5, 2021
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCED PIN COUNT INTERFACE
- Publication number 20210056067
- Publication date Feb 25, 2021
- Intel Corporation
- Michelle Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RECALIBRATION OF PHY CIRCUITRY FOR THE PCI EXPRESS (PIPE) INTERFAC...
- Publication number 20210034565
- Publication date Feb 4, 2021
- Intel Corporation
- Michelle C. Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLEX BUS PROTOCOL NEGOTIATION AND ENABLING SEQUENCE
- Publication number 20200210366
- Publication date Jul 2, 2020
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enabling Sync Header Suppression Latency Optimization In The Presen...
- Publication number 20190384733
- Publication date Dec 19, 2019
- Michelle Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALTERNATE PHYSICAL LAYER POWER MODE
- Publication number 20190324523
- Publication date Oct 24, 2019
- Michelle C. Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCED PIN COUNT INTERFACE
- Publication number 20190303338
- Publication date Oct 3, 2019
- Intel Corporation
- Michelle Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PHY RECALIBRATION USING A MESSAGE BUS INTERFACE
- Publication number 20190303342
- Publication date Oct 3, 2019
- Intel Corporation
- Michelle C. Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHARED BUFFERED MEMORY ROUTING
- Publication number 20190108124
- Publication date Apr 11, 2019
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLEX BUS PROTOCOL NEGOTIATION AND ENABLING SEQUENCE
- Publication number 20190065426
- Publication date Feb 28, 2019
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES TO SUPPORT MULTIPLE PROTOCOLS BETWEEN COMPUTER SYSTEM IN...
- Publication number 20190007310
- Publication date Jan 3, 2019
- Intel Corporation
- DEBENDRA DAS SHARMA
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LOW LATENCY RETIMER
- Publication number 20180181502
- Publication date Jun 28, 2018
- Intel Corporation
- Michelle Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHARED BUFFERED MEMORY ROUTING
- Publication number 20180067855
- Publication date Mar 8, 2018
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCED PIN COUNT INTERFACE
- Publication number 20170344512
- Publication date Nov 30, 2017
- Intel Corporation
- Michelle Jen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW-LATENCY INTERNODE COMMUNICATION
- Publication number 20170091003
- Publication date Mar 30, 2017
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHARING MEMORY AND I/O SERVICES BETWEEN NODES
- Publication number 20170004098
- Publication date Jan 5, 2017
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RELIABILITY, AVAILABILITY, AND SERVICEABILITY IN MULTI-NODE SYSTEMS...
- Publication number 20160283303
- Publication date Sep 29, 2016
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHARED BUFFERED MEMORY ROUTING
- Publication number 20160283375
- Publication date Sep 29, 2016
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PHYSICAL INTERFACE FOR A SERIAL INTERCONNECT
- Publication number 20160179710
- Publication date Jun 23, 2016
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING

Michelle C. Jen

Person

Patents Grantslast 30 patents

Recalibration of PHY circuitry for the PCI express (PIPE) interface...

Shared buffered memory routing

Techniques to support multiple protocols between computer system in...

Flex bus protocol negotiation and enabling sequence

Enabling sync header suppression latency optimization in the presen...

Recalibration of PHY circuitry for the PCI express (pipe) interface...

Enabling sync header suppression latency optimization in the presen...

Reduced pin count interface

Flex bus protocol negotiation and enabling sequence

Shared buffered memory routing

Techniques to support multiple protocols between computer system in...

Sharing memory and I/O services between nodes

Low latency retimer

Recalibration of PHY circuitry for the PCI Express (PIPE) interface...

Reduced pin count interface

Flex bus protocol negotiation and enabling sequence

Reduced pin count interface

Low power entry in a shared memory link

Physical interface for a serial interconnect

Shared buffered memory routing

Low-latency internode communication

Out-of-order servicing of read requests with minimal additional sto...

Patents Applicationslast 30 patents

SHARING MEMORY AND I/O SERVICES BETWEEN NODES

SHARED BUFFERED MEMORY ROUTING

SELECTION OF PROCESSING MODE FOR RECEIVER CIRCUIT

RECALIBRATION OF PHY CIRCUITRY FOR THE PCI EXPRESS (PIPE) INTERFAC...

Enabling Sync Header Suppression Latency Optimization In The Presen...

ALTERNATE PHYSICAL LAYER POWER MODE

FLEX BUS PROTOCOL NEGOTIATION AND ENABLING SEQUENCE

HARDWARE LOGGING FOR LANE MARGINING AND CHARACTERIZATION

SHARING MEMORY AND I/O SERVICES BETWEEN NODES

TECHNIQUES TO SUPPORT MULTIPLE PROTOCOLS BETWEEN COMPUTER SYSTEM IN...

SHARING MEMORY AND I/O SERVICES BETWEEN NODES

SHARED BUFFERED MEMORY ROUTING

REDUCED PIN COUNT INTERFACE

RECALIBRATION OF PHY CIRCUITRY FOR THE PCI EXPRESS (PIPE) INTERFAC...

FLEX BUS PROTOCOL NEGOTIATION AND ENABLING SEQUENCE

Enabling Sync Header Suppression Latency Optimization In The Presen...

ALTERNATE PHYSICAL LAYER POWER MODE

REDUCED PIN COUNT INTERFACE

PHY RECALIBRATION USING A MESSAGE BUS INTERFACE

SHARED BUFFERED MEMORY ROUTING

FLEX BUS PROTOCOL NEGOTIATION AND ENABLING SEQUENCE

TECHNIQUES TO SUPPORT MULTIPLE PROTOCOLS BETWEEN COMPUTER SYSTEM IN...

LOW LATENCY RETIMER

SHARED BUFFERED MEMORY ROUTING

REDUCED PIN COUNT INTERFACE

LOW-LATENCY INTERNODE COMMUNICATION

SHARING MEMORY AND I/O SERVICES BETWEEN NODES

RELIABILITY, AVAILABILITY, AND SERVICEABILITY IN MULTI-NODE SYSTEMS...

SHARED BUFFERED MEMORY ROUTING

PHYSICAL INTERFACE FOR A SERIAL INTERCONNECT