Miguel Guerrero

Person

Union City, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for the definition and generation of configura...
- Patent number 9,329,872
- Issue date May 3, 2016
- ESENCIA TECHNOLOGIES INC
- Miguel A. Guerrero
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for improving performance of a pipelined microprocessor by u...
- Patent number 9,182,992
- Issue date Nov 10, 2015
- ESENCIA TECHNOLOGIES INC
- Miguel A Guerrero
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Video noise level detection
- Patent number 7,852,412
- Issue date Dec 14, 2010
- NVIDIA Corporation
- Miguel A. Guerrero
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus to perform aging
- Patent number 7,567,566
- Issue date Jul 28, 2009
- Intel Corporation
- Kavitha A. Prasad
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus to perform a multi-field matching search
- Patent number 7,516,126
- Issue date Apr 7, 2009
- Intel Corporation
- Miguel Guerrero
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and data structure for a low memory overhead database
- Patent number 7,467,151
- Issue date Dec 16, 2008
- Intel Corporation
- Sreenath Kurupati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus, and method for string matching
- Patent number 7,349,981
- Issue date Mar 25, 2008
- Intel Corporation
- Miguel A. Guerrero
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Error correction for memory
- Patent number 7,203,889
- Issue date Apr 10, 2007
- Intel Corporation
- Alpesh B. Oza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Load balancing engine
- Patent number 7,180,894
- Issue date Feb 20, 2007
- Intel Corporation
- Miguel A. Guerrero
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Masking parity information associated with a ternary content addres...
- Patent number 7,152,140
- Issue date Dec 19, 2006
- Intel Corporation
- Kin Yip Sit
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for hardware and software co-simulation
- Patent number 7,107,202
- Issue date Sep 12, 2006
- Intel Corporation
- Gopal Hegde
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and data structure for a low memory overhead database
- Patent number 7,058,642
- Issue date Jun 6, 2006
- Intel Corporation
- Sreenath Kurupati
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Method for Improving Performance of a Pipelined Microprocessor by U...
- Publication number 20130332704
- Publication date Dec 12, 2013
- Esencia Technologies Inc.
- Miguel A Guerrero
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for the Definition and Generation of Configura...
- Publication number 20130290692
- Publication date Oct 31, 2013
- Esencia Technologies Inc.
- MIguel A. GUERRERO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for the Automatic Generation of RTL from an Un...
- Publication number 20130290693
- Publication date Oct 31, 2013
- Esencia Technologies Inc.
- MIguel A. GUERRERO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques for transposition of a matrix arranged in a memory as mu...
- Publication number 20060190517
- Publication date Aug 24, 2006
- Miguel A. Guerrero
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and data structure for a low memory overhead database
- Publication number 20060122989
- Publication date Jun 8, 2006
- Sreenath Kurupati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Staggering memory requests
- Publication number 20060117114
- Publication date Jun 1, 2006
- Rohit R. Verma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Port aggregation across stack of devices
- Publication number 20060013212
- Publication date Jan 19, 2006
- Hartej Singh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Error correction for memory
- Publication number 20050229089
- Publication date Oct 13, 2005
- Alpesh B. Oza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IP multicast packet burst absorption and multithreaded replication...
- Publication number 20050147095
- Publication date Jul 7, 2005
- Intel Corporation
- Miguel A. Guerrero
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Methods and apparatus for high bandwidth random access using dynami...
- Publication number 20050138276
- Publication date Jun 23, 2005
- Intel Corporation
- Muraleedhara H. Navada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, apparatus, and method for string matching
- Publication number 20050138322
- Publication date Jun 23, 2005
- Miguel A. Guerrero
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus to perform a multi-field matching search
- Publication number 20050053072
- Publication date Mar 10, 2005
- Miguel Guerrero
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus to perform aging
- Publication number 20050047408
- Publication date Mar 3, 2005
- Kavitha A. Prasad
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Parity check for ternary content addressable memory
- Publication number 20040260868
- Publication date Dec 23, 2004
- Kin Yip Sit
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for address lookup
- Publication number 20040042463
- Publication date Mar 4, 2004
- Intel Corporation
- Miguel A. Guerrero
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus for high-speed longest prefix match of keys in...
- Publication number 20040044868
- Publication date Mar 4, 2004
- Intel Corporation
- Miguel A. Guerrero
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Load balancing engine
- Publication number 20030223413
- Publication date Dec 4, 2003
- Miguel A. Guerrero
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Technique to accelerate learning rate on linearly sorted lookup tab...
- Publication number 20030188018
- Publication date Oct 2, 2003
- Miguel A. Guerrero
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and data structure for a low memory overhead database
- Publication number 20030182291
- Publication date Sep 25, 2003
- Sreenath Kurupati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for high-speed address learning in sorted addr...
- Publication number 20030163445
- Publication date Aug 28, 2003
- Alpesh B. Oza
- G06 - COMPUTING CALCULATING COUNTING

Miguel Guerrero

Person

Patents Grantslast 30 patents

Method and apparatus for the definition and generation of configura...

Method for improving performance of a pipelined microprocessor by u...

Video noise level detection

Method and apparatus to perform aging

Method and apparatus to perform a multi-field matching search

Method and data structure for a low memory overhead database

System, apparatus, and method for string matching

Error correction for memory

Load balancing engine

Masking parity information associated with a ternary content addres...

Method and apparatus for hardware and software co-simulation

Method and data structure for a low memory overhead database

Patents Applicationslast 30 patents

Method for Improving Performance of a Pipelined Microprocessor by U...

Method and Apparatus for the Definition and Generation of Configura...

Method and Apparatus for the Automatic Generation of RTL from an Un...

Techniques for transposition of a matrix arranged in a memory as mu...

Method and data structure for a low memory overhead database

Staggering memory requests

Port aggregation across stack of devices

Error correction for memory

IP multicast packet burst absorption and multithreaded replication...

Methods and apparatus for high bandwidth random access using dynami...

System, apparatus, and method for string matching

Method and apparatus to perform a multi-field matching search

Method and apparatus to perform aging

Parity check for ternary content addressable memory

Method and apparatus for address lookup

Method and apparatus for high-speed longest prefix match of keys in...

Load balancing engine

Technique to accelerate learning rate on linearly sorted lookup tab...

Method and data structure for a low memory overhead database

Method and apparatus for high-speed address learning in sorted addr...