Mike Pierce

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Plano, TX, US

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Patents Grantslast 30 patents

Information Patent Grant
Low profile, chip-scale package and method of fabrication
- Patent number 7,309,648
- Issue date Dec 18, 2007
- Texas Instruments Incorporated
- Navinchandra Kalidas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low profile, chip-scale package and method of fabrication
- Patent number 7,135,781
- Issue date Nov 14, 2006
- Texas Instruments Incorporated
- Navinchandra Kalidas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonding alignment mark for bonds over active circuits
- Patent number 6,465,898
- Issue date Oct 15, 2002
- Texas Instruments Incorporated
- Laura A. Hnilo
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR PACKAGE WITH ANTENNA
- Publication number 20200118949
- Publication date Apr 16, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Meysam Moallem
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low Profile, Chip-Scale Package and Method of Fabrication
- Publication number 20070020808
- Publication date Jan 25, 2007
- TEXAS INSTRUMENTS INCORPORATED
- Navinchandra Kalidas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low profile, chip-scale package and method of fabrication
- Publication number 20060033219
- Publication date Feb 16, 2006
- Navinchandra Kalidas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Thermally-enhanced integrated circuit package
- Publication number 20040021213
- Publication date Feb 5, 2004
- Shin Shern Low
- H01 - BASIC ELECTRIC ELEMENTS