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Mike Rowlandson
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Portland, OR, US
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Patents Grants
last 30 patents
Information
Patent Grant
Self-aligned NPN transistor with raised extrinsic base
Patent number
7,026,666
Issue date
Apr 11, 2006
Maxim Integrated Products, Inc.
Alexander Kalnitsky
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Test structure for determining a minimum tunnel opening size in a n...
Patent number
6,989,551
Issue date
Jan 24, 2006
Lattice Semiconductor Corporation
Allen Gunther
G11 - INFORMATION STORAGE
Information
Patent Grant
Method of forming a super self-aligned hetero-junction bipolar tran...
Patent number
6,861,324
Issue date
Mar 1, 2005
Maxim Integrated Products, Inc.
Alexander Kalnitsky
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method of preventing high Icc at start-up in zero-power EEPROM cell...
Patent number
6,845,044
Issue date
Jan 18, 2005
Lattice Semiconductor Corporation
Andrew Horch
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method of forming self-aligned NPN transistor with raised extrinsic...
Patent number
6,767,798
Issue date
Jul 27, 2004
Maxim Integrated Products, Inc.
Alexander Kalnitsky
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method of forming self-aligned bipolar transistor
Patent number
6,686,250
Issue date
Feb 3, 2004
Maxim Integrated Products, Inc.
Alexander Kalnitsky
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Non-volatile memory element having a cascoded transistor scheme to...
Patent number
6,636,442
Issue date
Oct 21, 2003
Lattice Semiconductor Corporation
Michael Rowlandson
G11 - INFORMATION STORAGE
Patents Applications
last 30 patents
Information
Patent Application
Self-aligned NPN transistor with raised extrinsic base
Publication number
20040126978
Publication date
Jul 1, 2004
Alexander Kalnitsky
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
Self-aligned NPN transistor with raised extrinsic base
Publication number
20030189239
Publication date
Oct 9, 2003
Alexander Kalnitsky
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
NON-VOLATILE MEMORY ELEMENT HAVING A CASCODED TRANSISTOR SCHEME TO...
Publication number
20030142549
Publication date
Jul 31, 2003
Michael Rowlandson
G11 - INFORMATION STORAGE
Information
Patent Application
Method of preventing high Icc at start-up in zero-power EEPROM cell...
Publication number
20030143793
Publication date
Jul 31, 2003
Andrew Horch
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
Test structure and method for determining a minimum tunnel opening...
Publication number
20030085727
Publication date
May 8, 2003
Lattice Semiconductor Corporation
Allen Gunther
G11 - INFORMATION STORAGE
Information
Patent Application
Method for forming a super self-aligned hetero-junction bipolar tra...
Publication number
20020192894
Publication date
Dec 19, 2002
Alexander Kalnitsky
H01 - BASIC ELECTRIC ELEMENTS