Millind Mittal

Person

Saratoga, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
IC with adaptive chip-to-chip interface to support different chip-t...
- Patent number 12,066,969
- Issue date Aug 20, 2024
- Xilinx, Inc.
- Krishnan Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Routing network using global address map with adaptive main memory...
- Patent number 12,045,187
- Issue date Jul 23, 2024
- Xilinx, Inc.
- Jaideep Dastidar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache coherent acceleration function virtualization with hierarchic...
- Patent number 11,983,575
- Issue date May 14, 2024
- Xilinx, Inc.
- Millind Mittal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fine-grained multi-tenant cache management
- Patent number 11,983,117
- Issue date May 14, 2024
- Xilinx, Inc.
- Millind Mittal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Routing network using global address map with adaptive main memory...
- Patent number 11,693,805
- Issue date Jul 4, 2023
- Xilinx, Inc.
- Jaideep Dastidar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid hardware-software coherent framework
- Patent number 11,586,369
- Issue date Feb 21, 2023
- Xilinx, Inc.
- Millind Mittal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logical transport overlayed over a physical transport having a tree...
- Patent number 11,563,639
- Issue date Jan 24, 2023
- Xilinx, Inc.
- Millind Mittal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Hardware coherent computational expansion memory
- Patent number 11,556,344
- Issue date Jan 17, 2023
- Xilinx, Inc.
- Millind Mittal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache coherent acceleration function virtualization
- Patent number 11,474,871
- Issue date Oct 18, 2022
- Xilinx, Inc.
- Millind Mittal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logical transport over a fixed PCIE physical transport network
- Patent number 11,477,049
- Issue date Oct 18, 2022
- Xilinx, Inc.
- Millind Mittal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Disaggregated switch control path with direct-attached dispatch
- Patent number 11,386,031
- Issue date Jul 12, 2022
- Xilinx, Inc.
- Millind Mittal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple protocol layer conversion
- Patent number 11,375,050
- Issue date Jun 28, 2022
- Xilinx, Inc.
- Millind Mittal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Fine-grained multi-tenant cache management
- Patent number 11,372,769
- Issue date Jun 28, 2022
- Xilinx, Inc.
- Millind Mittal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compressed tag coherency messaging
- Patent number 11,271,860
- Issue date Mar 8, 2022
- Xilinx, Inc.
- Millind Mittal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Producer-to-consumer active direct cache transfers
- Patent number 11,113,194
- Issue date Sep 7, 2021
- Xilinx, Inc.
- Jaideep Dastidar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Delegated snoop protocol
- Patent number 11,093,394
- Issue date Aug 17, 2021
- Xilinx, Inc.
- Millind Mittal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Routing network using global address map with adaptive main memory...
- Patent number 11,074,208
- Issue date Jul 27, 2021
- Xilinx, Inc.
- Jaideep Dastidar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Domain aware data migration in coherent heterogenous systems
- Patent number 10,970,217
- Issue date Apr 6, 2021
- Xilinx, Inc.
- Jaideep Dastidar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Machine learning model updates to ML accelerators
- Patent number 10,817,462
- Issue date Oct 27, 2020
- Xilinx, Inc.
- Jaideep Dastidar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid precise and imprecise cache snoop filtering
- Patent number 10,761,985
- Issue date Sep 1, 2020
- Xilinx, Inc.
- Millind Mittal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable coherence management independent of transport protocol
- Patent number 10,698,824
- Issue date Jun 30, 2020
- Xilinx, Inc.
- Millind Mittal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
End-to-end quality-of-service in a network-on-chip
- Patent number 10,673,745
- Issue date Jun 2, 2020
- Xilinx, Inc.
- Ian A. Swarbrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transparent port aggregation in multi-chip transport protocols
- Patent number 10,664,422
- Issue date May 26, 2020
- Xilinx, Inc.
- Millind Mittal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transparent port aggregation in multi-chip transport protocols
- Patent number 10,409,743
- Issue date Sep 10, 2019
- Xilinx, Inc.
- Millind Mittal
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Extended Attributes for Shared Page Tables
- Publication number 20250004949
- Publication date Jan 2, 2025
- ADVANCED MICRO DEVICES, INC.
- Paul Blinzer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IIC WITH ADAPTIVE CHIP-TO-CHIP INTERFACE TO SUPPORT DIFFERENT CHIP-...
- Publication number 20240411715
- Publication date Dec 12, 2024
- Xilinx, Inc.
- Krishnan SRINIVASAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE LOGIC FABRIC AS DIE TO DIE INTERCONNECT
- Publication number 20240313781
- Publication date Sep 19, 2024
- Xilinx, Inc.
- Brian C. GAIDE
- G01 - MEASURING TESTING
Information Patent Application
HOST ENDPOINT ADAPTIVE COMPUTE COMPOSABILITY
- Publication number 20240061805
- Publication date Feb 22, 2024
- Xilinx, Inc.
- Jaideep Dastidar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROUTING NETWORK USING GLOBAL ADDRESS MAP WITH ADAPTIVE MAIN MEMORY...
- Publication number 20230325333
- Publication date Oct 12, 2023
- Xilinx, Inc.
- Jaideep DASTIDAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE CHIP-TO-CHIP INTERFACE PROTOCOL ARCHITECTURE
- Publication number 20230244628
- Publication date Aug 3, 2023
- Xilinx, Inc.
- Krishnan SRINIVASAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MACHINE LEARNING MODEL UPDATES TO ML ACCELERATORS
- Publication number 20230195684
- Publication date Jun 22, 2023
- Xilinx, Inc.
- Jaideep DASTIDAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE COHERENT ACCELERATION FUNCTION VIRTUALIZATION
- Publication number 20230004442
- Publication date Jan 5, 2023
- Xilinx, Inc.
- Millind Mittal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FINE-GRAINED MULTI-TENANT CACHE MANAGEMENT
- Publication number 20220292024
- Publication date Sep 15, 2022
- Xilinx, Inc.
- Millind Mittal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE COHERENT COMPUTATIONAL EXPANSION MEMORY
- Publication number 20220100523
- Publication date Mar 31, 2022
- Xilinx, Inc.
- Millind Mittal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISAGGREGATED SWITCH CONTROL PATH WITH DIRECT-ATTACHED DISPATCH
- Publication number 20210382838
- Publication date Dec 9, 2021
- Xilinx, Inc.
- Millind Mittal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRODUCER-TO-CONSUMER ACTIVE DIRECT CACHE TRANSFERS
- Publication number 20210064529
- Publication date Mar 4, 2021
- Xilinx, Inc.
- Jaideep Dastidar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID HARDWARE-SOFTWARE COHERENT FRAMEWORK
- Publication number 20200379664
- Publication date Dec 3, 2020
- Xilinx, Inc.
- Millind Mittal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MACHINE LEARNING MODEL UPDATES TO ML ACCELERATORS
- Publication number 20200341941
- Publication date Oct 29, 2020
- Xilinx, Inc.
- Jaideep Dastidar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID PRECISE AND IMPRECISE CACHE SNOOP FILTERING
- Publication number 20200042446
- Publication date Feb 6, 2020
- Xilinx, Inc.
- Millind Mittal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGICAL TRANSPORT OVER A FIXED PCIE PHYSICAL TRANSPORT NETWORK
- Publication number 20200044895
- Publication date Feb 6, 2020
- Xilinx, Inc.
- Millind Mittal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
END-TO-END QUALITY-OF-SERVICE IN A NETWORK-ON-CHIP
- Publication number 20190238453
- Publication date Aug 1, 2019
- Xilinx, Inc.
- Ian A. Swarbrick
- G06 - COMPUTING CALCULATING COUNTING

Millind Mittal

Person

Patents Grantslast 30 patents

IC with adaptive chip-to-chip interface to support different chip-t...

Routing network using global address map with adaptive main memory...

Cache coherent acceleration function virtualization with hierarchic...

Fine-grained multi-tenant cache management

Routing network using global address map with adaptive main memory...

Hybrid hardware-software coherent framework

Logical transport overlayed over a physical transport having a tree...

Hardware coherent computational expansion memory

Cache coherent acceleration function virtualization

Logical transport over a fixed PCIE physical transport network

Disaggregated switch control path with direct-attached dispatch

Multiple protocol layer conversion

Fine-grained multi-tenant cache management

Compressed tag coherency messaging

Producer-to-consumer active direct cache transfers

Delegated snoop protocol

Routing network using global address map with adaptive main memory...

Domain aware data migration in coherent heterogenous systems

Machine learning model updates to ML accelerators

Hybrid precise and imprecise cache snoop filtering

Scalable coherence management independent of transport protocol

End-to-end quality-of-service in a network-on-chip

Transparent port aggregation in multi-chip transport protocols

Transparent port aggregation in multi-chip transport protocols

Patents Applicationslast 30 patents

Extended Attributes for Shared Page Tables

IIC WITH ADAPTIVE CHIP-TO-CHIP INTERFACE TO SUPPORT DIFFERENT CHIP-...

PROGRAMMABLE LOGIC FABRIC AS DIE TO DIE INTERCONNECT

HOST ENDPOINT ADAPTIVE COMPUTE COMPOSABILITY

ROUTING NETWORK USING GLOBAL ADDRESS MAP WITH ADAPTIVE MAIN MEMORY...

ADAPTIVE CHIP-TO-CHIP INTERFACE PROTOCOL ARCHITECTURE

MACHINE LEARNING MODEL UPDATES TO ML ACCELERATORS

CACHE COHERENT ACCELERATION FUNCTION VIRTUALIZATION

FINE-GRAINED MULTI-TENANT CACHE MANAGEMENT

HARDWARE COHERENT COMPUTATIONAL EXPANSION MEMORY

DISAGGREGATED SWITCH CONTROL PATH WITH DIRECT-ATTACHED DISPATCH

PRODUCER-TO-CONSUMER ACTIVE DIRECT CACHE TRANSFERS

HYBRID HARDWARE-SOFTWARE COHERENT FRAMEWORK

MACHINE LEARNING MODEL UPDATES TO ML ACCELERATORS

HYBRID PRECISE AND IMPRECISE CACHE SNOOP FILTERING

LOGICAL TRANSPORT OVER A FIXED PCIE PHYSICAL TRANSPORT NETWORK

END-TO-END QUALITY-OF-SERVICE IN A NETWORK-ON-CHIP