MinJung Kim

Person

Kyounggi do, KR

People

Patents Grantslast 30 patents

Information Patent Grant
Integrated circuit packaging system with plated copper posts and me...
- Patent number 9,693,455
- Issue date Jun 27, 2017
- STATS ChipPAC Pte. Ltd.
- Seong Won Park
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Semiconductor device and method of backgrinding and singulation of...
- Patent number 9,401,289
- Issue date Jul 26, 2016
- STATS ChipPAC Pte. Ltd.
- MinJung Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming thermal interface materi...
- Patent number 9,281,228
- Issue date Mar 8, 2016
- STATS ChipPAC, Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming pre-molded substrate to...
- Patent number 8,836,097
- Issue date Sep 16, 2014
- STATS ChipPAC, Ltd.
- DaeWook Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with heat slug and method of ma...
- Patent number 8,710,640
- Issue date Apr 29, 2014
- Stats Chippac Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with coupling features and meth...
- Patent number 8,710,670
- Issue date Apr 29, 2014
- Stats Chippac Ltd.
- MinJung Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with warpage preventing mechani...
- Patent number 8,703,535
- Issue date Apr 22, 2014
- Stats Chippac Ltd.
- MinJung Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with heat conduction and method...
- Patent number 8,679,900
- Issue date Mar 25, 2014
- Stats Chippac Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming pre-molded substrate to...
- Patent number 8,409,918
- Issue date Apr 2, 2013
- STATS ChipPAC, Ltd.
- DaeWook Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with stack interconnect and met...
- Patent number 8,372,695
- Issue date Feb 12, 2013
- Stats Chippac Ltd.
- SangMi Park
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH NO-REFLOW CONNECTION AND M...
- Publication number 20150318259
- Publication date Nov 5, 2015
- KyungOe Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH WARPAGE PREVENTING MECHANI...
- Publication number 20130328179
- Publication date Dec 12, 2013
- MinJung Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Backgrinding and Singulation of...
- Publication number 20130320519
- Publication date Dec 5, 2013
- STATS ChipPAC, Ltd.
- MinJung Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Pre-Molded Substrate to...
- Publication number 20130200527
- Publication date Aug 8, 2013
- STATS ChipPAC, Ltd.
- DaeWook Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH HEAT SLUG AND METHOD OF MA...
- Publication number 20130154078
- Publication date Jun 20, 2013
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH HEAT CONDUCTION AND METHOD...
- Publication number 20130154085
- Publication date Jun 20, 2013
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH COUPLING FEATURES AND METH...
- Publication number 20130154107
- Publication date Jun 20, 2013
- MinJung Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Sloped Surface in Patter...
- Publication number 20130113118
- Publication date May 9, 2013
- STATS ChipPAC, Ltd.
- MinJung Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Thermal Interface Materi...
- Publication number 20130105963
- Publication date May 2, 2013
- STATS ChipPAC, Ltd.
- DaeSik Choi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACK INTERCONNECT AND MET...
- Publication number 20120126428
- Publication date May 24, 2012
- SangMi Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Pre-Molded Substrate to...
- Publication number 20120056334
- Publication date Mar 8, 2012
- STATS ChipPAC, Ltd.
- DaeWook Yang
- H01 - BASIC ELECTRIC ELEMENTS

MinJung Kim

Person

Patents Grantslast 30 patents

Integrated circuit packaging system with plated copper posts and me...

Semiconductor device and method of backgrinding and singulation of...

Semiconductor device and method of forming thermal interface materi...

Semiconductor device and method of forming pre-molded substrate to...

Integrated circuit packaging system with heat slug and method of ma...

Integrated circuit packaging system with coupling features and meth...

Integrated circuit packaging system with warpage preventing mechani...

Integrated circuit packaging system with heat conduction and method...

Semiconductor device and method of forming pre-molded substrate to...

Integrated circuit packaging system with stack interconnect and met...

Patents Applicationslast 30 patents

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH NO-REFLOW CONNECTION AND M...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH WARPAGE PREVENTING MECHANI...

Semiconductor Device and Method of Backgrinding and Singulation of...

Semiconductor Device and Method of Forming Pre-Molded Substrate to...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH HEAT SLUG AND METHOD OF MA...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH HEAT CONDUCTION AND METHOD...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH COUPLING FEATURES AND METH...

Semiconductor Device and Method of Forming Sloped Surface in Patter...

Semiconductor Device and Method of Forming Thermal Interface Materi...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACK INTERCONNECT AND MET...

Semiconductor Device and Method of Forming Pre-Molded Substrate to...