Mitchell PAGE

Person

Mesa, AZ, US

People

Patents Applicationslast 30 patents

Information Patent Application
MICROELECTRONIC ASSEMBLIES WITH THROUGH-GLASS VIA STRESS ALLEVIATIO...
- Publication number 20250183182
- Publication date Jun 5, 2025
- Bohan Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GLASS CORES WITH EMBEDDED POWER DELIVERY COMPONENTS
- Publication number 20250132264
- Publication date Apr 24, 2025
- Intel Corporation
- Huong Thu Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THROUGH-GLASS VIA LINERS FOR INTEGRATED CIRCUIT DEVICE PACKAGES
- Publication number 20250112163
- Publication date Apr 3, 2025
- Intel Corporation
- Pratyush Mishra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC ASSEMBLIES WITH EDGE STRESS REDUCTION IN GLASS CORES
- Publication number 20250112175
- Publication date Apr 3, 2025
- Intel Corporation
- Brandon C. Marin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GLASS CORE PROTECTION USING PERIPHERAL BUFFER LAYERS
- Publication number 20250112136
- Publication date Apr 3, 2025
- Intel Corporation
- Bohan SHAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THROUGH GLASS VIA (TGV) WITH MODULATED PROFILE FOR CORE STRESS REDU...
- Publication number 20250113434
- Publication date Apr 3, 2025
- Intel Corporation
- Bai NIE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRESS MITIGATION ARCHITECTURES FOR GLASS CORE SUBSTRATES
- Publication number 20250112140
- Publication date Apr 3, 2025
- Intel Corporation
- Rahul BHURE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NANOTWIN LINER FOR THROUGH GLASS VIAS
- Publication number 20250106982
- Publication date Mar 27, 2025
- Intel Corporation
- Sashi S. KANDANUR
- H01 - BASIC ELECTRIC ELEMENTS

Mitchell PAGE

Person

Patents Applicationslast 30 patents

MICROELECTRONIC ASSEMBLIES WITH THROUGH-GLASS VIA STRESS ALLEVIATIO...

GLASS CORES WITH EMBEDDED POWER DELIVERY COMPONENTS

THROUGH-GLASS VIA LINERS FOR INTEGRATED CIRCUIT DEVICE PACKAGES

MICROELECTRONIC ASSEMBLIES WITH EDGE STRESS REDUCTION IN GLASS CORES

GLASS CORE PROTECTION USING PERIPHERAL BUFFER LAYERS

THROUGH GLASS VIA (TGV) WITH MODULATED PROFILE FOR CORE STRESS REDU...

STRESS MITIGATION ARCHITECTURES FOR GLASS CORE SUBSTRATES

NANOTWIN LINER FOR THROUGH GLASS VIAS