Mitesh C. Patel

Person

Phoenix, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Chip package thermal interface materials with dielectric obstructio...
- Patent number 7,776,657
- Issue date Aug 17, 2010
- Intel Corporation
- Ashay A. Dani
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for precise alignment of packaging caps on a substrate
- Patent number 7,584,536
- Issue date Sep 8, 2009
- Intel Corporation
- Gregory S. Clemons
- B65 - CONVEYING PACKING STORING HANDLING THIN OR FILAMENTARY MATERIAL
Information Patent Grant
Chip package thermal interface materials with dielectric obstructio...
- Patent number 7,332,807
- Issue date Feb 19, 2008
- Intel Corporation
- Ashay A. Dani
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stress-relief layers and stress-compensation collars with low-tempe...
- Patent number 7,291,548
- Issue date Nov 6, 2007
- Intel Corporation
- Daewoong Suh
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Apparatus for precise alignment of packaging caps on a substrate
- Patent number 7,275,312
- Issue date Oct 2, 2007
- Intel Corporation
- Gregory S. Clemons
- B65 - CONVEYING PACKING STORING HANDLING THIN OR FILAMENTARY MATERIAL
Information Patent Grant
Stress-relief layers and stress-compensation collars with low-tempe...
- Patent number 7,253,088
- Issue date Aug 7, 2007
- Intel Corporation
- Daewoong Suh
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Package stress management
- Patent number 7,179,689
- Issue date Feb 20, 2007
- Intel Corporation
- James C. Matayabas, Jr.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package stress management
- Patent number 7,170,188
- Issue date Jan 30, 2007
- Intel Corporation
- James C. Matayabas, Jr.
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
CHIP PACKAGE THERMAL INTERFACE MATERIALS WITH DIELECTRIC OBSTRUCTIO...
- Publication number 20080064144
- Publication date Mar 13, 2008
- Intel Corporation
- Ashay A. Dani
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Apparatus and method for precise alignment of packaging caps on a s...
- Publication number 20070257360
- Publication date Nov 8, 2007
- Gregory S. Clemons
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRESS-RELIEF LAYERS AND STRESS-COMPENSATION COLLARS WITH LOW-TEMPE...
- Publication number 20070190772
- Publication date Aug 16, 2007
- Intel Corporation
- Daewoong Suh
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Chip package thermal interface materials with dielectric obstructio...
- Publication number 20070158823
- Publication date Jul 12, 2007
- Intel Corporation
- Ashay A. Dani
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Chip package dielectric sheet for body-biasing
- Publication number 20070152325
- Publication date Jul 5, 2007
- Intel Corporation
- Ashay A. Dani
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stress-relief layers and stress-compensation collars with low-tempe...
- Publication number 20060068579
- Publication date Mar 30, 2006
- Daewoong Suh
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Package stress management
- Publication number 20060065984
- Publication date Mar 30, 2006
- James C. Matayabas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Package stress management
- Publication number 20060001158
- Publication date Jan 5, 2006
- James C. Matayabas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Apparatus and method for precise alignment of packaging caps on a s...
- Publication number 20040261262
- Publication date Dec 30, 2004
- Gregory S. Clemons
- H01 - BASIC ELECTRIC ELEMENTS

Mitesh C. Patel

Person

Patents Grantslast 30 patents

Chip package thermal interface materials with dielectric obstructio...

Process for precise alignment of packaging caps on a substrate

Chip package thermal interface materials with dielectric obstructio...

Stress-relief layers and stress-compensation collars with low-tempe...

Apparatus for precise alignment of packaging caps on a substrate

Stress-relief layers and stress-compensation collars with low-tempe...

Package stress management

Package stress management

Patents Applicationslast 30 patents

CHIP PACKAGE THERMAL INTERFACE MATERIALS WITH DIELECTRIC OBSTRUCTIO...

Apparatus and method for precise alignment of packaging caps on a s...

STRESS-RELIEF LAYERS AND STRESS-COMPENSATION COLLARS WITH LOW-TEMPE...

Chip package thermal interface materials with dielectric obstructio...

Chip package dielectric sheet for body-biasing

Stress-relief layers and stress-compensation collars with low-tempe...

Package stress management

Package stress management

Apparatus and method for precise alignment of packaging caps on a s...