Mitesh R. Meswani

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Device link management
- Patent number 11,822,926
- Issue date Nov 21, 2023
- NVIDIA Corporation
- Mitesh Meswani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scoped persistence barriers for non-volatile memories
- Patent number 11,573,724
- Issue date Feb 7, 2023
- Advanced Micro Devices, Inc.
- Arkaprava Basu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Heterogeneous graphics processing unit for scheduling thread groups...
- Patent number 10,713,059
- Issue date Jul 14, 2020
- Advanced Micro Devices, Inc.
- Joseph L. Greathouse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-processor apparatus and method of detection and acceleration...
- Patent number 10,592,279
- Issue date Mar 17, 2020
- Advanced Micro Devices, Inc.
- Arkaprava Basu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data block sizing for channels in a multi-channel high-bandwidth me...
- Patent number 10,503,655
- Issue date Dec 10, 2019
- Advanced Micro Devices, Inc.
- Mitesh R. Meswani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performance-aware and reliability-aware data placement for n-level...
- Patent number 10,365,996
- Issue date Jul 30, 2019
- Advanced Micro Devices, Inc.
- Manish Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scoped persistence barriers for non-volatile memories
- Patent number 10,324,650
- Issue date Jun 18, 2019
- Advanced Micro Devices, Inc.
- Arkaprava Basu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Leases for blocks of memory in a multi-level memory
- Patent number 10,324,760
- Issue date Jun 18, 2019
- Advanced Micro Devices, Inc.
- Mitesh Meswani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for changing management modes of multilevel memory hiera...
- Patent number 10,318,153
- Issue date Jun 11, 2019
- Advanced Micro Devices, Inc.
- Sergey Blagodurov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cluster-based migration in a multi-level memory hierarchy
- Patent number 10,282,292
- Issue date May 7, 2019
- Advanced Micro Devices, Inc.
- Andreas Prodromou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hot page selection in multi-level memory hierarchies
- Patent number 10,235,290
- Issue date Mar 19, 2019
- Advanced Micro Devices, Inc.
- Sergey Blagodurov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory-sampling based migrating page cache
- Patent number 10,089,014
- Issue date Oct 2, 2018
- Advanced Micro Devices, Inc.
- Ahsen Jamshed Uppal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing inter-lane power management
- Patent number 9,983,655
- Issue date May 29, 2018
- Advanced Micro Devices, Inc.
- Mitesh R. Meswani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory page access detection
- Patent number 9,727,241
- Issue date Aug 8, 2017
- Advanced Micro Devices, Inc.
- Gabriel H. Loh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ring networks for intra- and inter-memory I/O including 3D-stacked...
- Patent number 9,443,561
- Issue date Sep 13, 2016
- Advanced Micro Devices, Inc.
- David Roberts
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for memory allocation in a multiclass memory system
- Patent number 9,377,954
- Issue date Jun 28, 2016
- Advanced Micro Devices, Inc.
- Gabriel Loh
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DEVICE LINK MANAGEMENT
- Publication number 20240296052
- Publication date Sep 5, 2024
- NVIDIA Corporation
- Mitesh Meswani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEVICE LINK MANAGEMENT
- Publication number 20210081209
- Publication date Mar 18, 2021
- NVIDIA Corporation
- Mitesh Meswani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCOPED PERSISTENCE BARRIERS FOR NON-VOLATILE MEMORIES
- Publication number 20190286362
- Publication date Sep 19, 2019
- ADVANCED MICRO DEVICES, INC.
- Arkaprava Basu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cluster-Based Migration in a Multi-Level Memory Hierarchy
- Publication number 20180107598
- Publication date Apr 19, 2018
- Advanced Micro Devices, Inc.
- Andreas Prodromou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCOPED PERSISTENCE BARRIERS FOR NON-VOLATILE MEMORIES
- Publication number 20180088858
- Publication date Mar 29, 2018
- Advanced Micro Devices, Inc.
- Arkaprava Basu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY-SAMPLING BASED MIGRATING PAGE CACHE
- Publication number 20180081541
- Publication date Mar 22, 2018
- Advanced Micro Devices, Inc.
- Ahsen Jamshed Uppal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data Block Sizing for Channels in a Multi-Channel High-Bandwidth Me...
- Publication number 20180024935
- Publication date Jan 25, 2018
- Advanced Micro Devices, Inc.
- Mitesh R. Meswani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-PROCESSOR APPARATUS AND METHOD OF DETECTION AND ACCELERATION...
- Publication number 20170371720
- Publication date Dec 28, 2017
- Advanced Micro Devices, Inc.
- Arkaprava Basu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Leases for Blocks of Memory in a Multi-Level Memory
- Publication number 20170315915
- Publication date Nov 2, 2017
- Advanced Micro Devices, Inc.
- Mitesh Meswani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERFORMANCE-AWARE AND RELIABILITY-AWARE DATA PLACEMENT FOR N-LEVEL...
- Publication number 20170277441
- Publication date Sep 28, 2017
- Advanced Micro Devices, Inc.
- Manish Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR PERFORMING INTER-LANE POWER MANAGEMENT
- Publication number 20170168546
- Publication date Jun 15, 2017
- Advanced Micro Devices, Inc.
- Mitesh R. Meswani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTATION ALONG A DATAPATH BETWEEN MEMORY BLOCKS
- Publication number 20170147228
- Publication date May 25, 2017
- Advanced Micro Devices, Inc.
- Dmitri Yudanov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISTRIBUTED MEMORY CONTROLLER
- Publication number 20170083474
- Publication date Mar 23, 2017
- Advanced Micro Devices, Inc.
- Mitesh R. Meswani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURING FAST MEMORY AS CACHE FOR SLOW MEMORY
- Publication number 20170083444
- Publication date Mar 23, 2017
- Advanced Micro Devices, Inc.
- Kapil Dev
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HOT PAGE SELECTION IN MULTI-LEVEL MEMORY HIERARCHIES
- Publication number 20160378655
- Publication date Dec 29, 2016
- Advanced Micro Devices, Inc.
- Sergey Blagodurov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INDEPENDENT BETWEEN-MODULE PREFETCHING FOR PROCESSOR MEMORY MODULES
- Publication number 20160378667
- Publication date Dec 29, 2016
- Advanced Micro Devices, Inc.
- David Andrew Roberts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY PAGE ACCESS DETECTION
- Publication number 20160231933
- Publication date Aug 11, 2016
- Advanced Micro Devices, Inc.
- Gabriel H. Loh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR CHANGING MANAGEMENT MODES OF MULTILEVEL MEMORY HIERA...
- Publication number 20160179382
- Publication date Jun 23, 2016
- Advanced Micro Devices, Inc.
- Sergey Blagodurov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HETEROGENEOUS FUNCTION UNIT DISPATCH IN A GRAPHICS PROCESSING UNIT
- Publication number 20160085551
- Publication date Mar 24, 2016
- Advanced Micro Devices, Inc.
- Joseph L. Greathouse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR MEMORY ALLOCATION IN A MULTICLASS MEMORY SYSTEM
- Publication number 20150324131
- Publication date Nov 12, 2015
- Advanced Micro Devices, Inc.
- Gabriel Loh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RELOCATING INFREQUENTLY-ACCESSED DYNAMIC RANDOM ACCESS MEMORY (DRAM...
- Publication number 20150206574
- Publication date Jul 23, 2015
- Advanced Micro Devices, Inc.
- Joseph L. Greathouse
- G11 - INFORMATION STORAGE

Mitesh R. Meswani

Person

Patents Grantslast 30 patents

Device link management

Scoped persistence barriers for non-volatile memories

Heterogeneous graphics processing unit for scheduling thread groups...

Multi-processor apparatus and method of detection and acceleration...

Data block sizing for channels in a multi-channel high-bandwidth me...

Performance-aware and reliability-aware data placement for n-level...

Scoped persistence barriers for non-volatile memories

Leases for blocks of memory in a multi-level memory

Techniques for changing management modes of multilevel memory hiera...

Cluster-based migration in a multi-level memory hierarchy

Hot page selection in multi-level memory hierarchies

Memory-sampling based migrating page cache

Method and apparatus for performing inter-lane power management

Memory page access detection

Ring networks for intra- and inter-memory I/O including 3D-stacked...

System and method for memory allocation in a multiclass memory system

Patents Applicationslast 30 patents

DEVICE LINK MANAGEMENT

DEVICE LINK MANAGEMENT

SCOPED PERSISTENCE BARRIERS FOR NON-VOLATILE MEMORIES

Cluster-Based Migration in a Multi-Level Memory Hierarchy

SCOPED PERSISTENCE BARRIERS FOR NON-VOLATILE MEMORIES

MEMORY-SAMPLING BASED MIGRATING PAGE CACHE

Data Block Sizing for Channels in a Multi-Channel High-Bandwidth Me...

MULTI-PROCESSOR APPARATUS AND METHOD OF DETECTION AND ACCELERATION...

Leases for Blocks of Memory in a Multi-Level Memory

PERFORMANCE-AWARE AND RELIABILITY-AWARE DATA PLACEMENT FOR N-LEVEL...

METHOD AND APPARATUS FOR PERFORMING INTER-LANE POWER MANAGEMENT

COMPUTATION ALONG A DATAPATH BETWEEN MEMORY BLOCKS

DISTRIBUTED MEMORY CONTROLLER

CONFIGURING FAST MEMORY AS CACHE FOR SLOW MEMORY

HOT PAGE SELECTION IN MULTI-LEVEL MEMORY HIERARCHIES

INDEPENDENT BETWEEN-MODULE PREFETCHING FOR PROCESSOR MEMORY MODULES

MEMORY PAGE ACCESS DETECTION

TECHNIQUES FOR CHANGING MANAGEMENT MODES OF MULTILEVEL MEMORY HIERA...

HETEROGENEOUS FUNCTION UNIT DISPATCH IN A GRAPHICS PROCESSING UNIT

SYSTEM AND METHOD FOR MEMORY ALLOCATION IN A MULTICLASS MEMORY SYSTEM

RELOCATING INFREQUENTLY-ACCESSED DYNAMIC RANDOM ACCESS MEMORY (DRAM...