TREA

Mitsuaki Tomida

Follow

Person

  • Kasugai, JP
People

Patents Grantslast 30 patents

  • Information Patent Grant

    Buffer Circuit and control method thereof
    • Patent number 7,646,221
    • Issue date Jan 12, 2010
    • Fujitsu Microelectronics Limited
    • Toyoki Suzuki
    • H03 - BASIC ELECTRONIC CIRCUITRY
  • Information Patent Grant

    Tolerant input circuit
    • Patent number 7,501,852
    • Issue date Mar 10, 2009
    • Fujitsu Microelectronics Limited
    • Toyoki Suzuki
    • H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

  • Information Patent Application

    Buffer circuit and control method thereof
    • Publication number 20080079475
    • Publication date Apr 3, 2008
    • FUJITSU LIMITED
    • Toyoki Suzuki
    • H03 - BASIC ELECTRONIC CIRCUITRY
  • Information Patent Application

    Tolerant input circuit
    • Publication number 20060220686
    • Publication date Oct 5, 2006
    • FUJITSU LIMITED
    • Toyoki Suzuki
    • H03 - BASIC ELECTRONIC CIRCUITRY