Mohiuddin M. Mazumder

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
High performance interconnect
- Patent number 11,599,497
- Issue date Mar 7, 2023
- Intel Corporation
- Zuoguo Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Extending multichip package link off package
- Patent number 11,386,033
- Issue date Jul 12, 2022
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Extending multichip package link off package
- Patent number 11,113,225
- Issue date Sep 7, 2021
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance interconnect
- Patent number 10,789,201
- Issue date Sep 29, 2020
- Intel Corporation
- Zuoguo Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Extending multichip package link off package
- Patent number 10,678,736
- Issue date Jun 9, 2020
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor package with first level die bump ground webbing str...
- Patent number 10,453,795
- Issue date Oct 22, 2019
- Intel Corporation
- Yu Amos Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flex cable and method for making the same
- Patent number 8,508,947
- Issue date Aug 13, 2013
- Intel Corporation
- Sanka Ganesan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Circuit board-to-circuit board connectors having electro-optic modu...
- Patent number 7,525,723
- Issue date Apr 28, 2009
- Intel Corporation
- Sanjay Dabral
- G01 - MEASURING TESTING
Information Patent Grant
Technique for blind-mating daughtercard to mainboard
- Patent number 7,402,048
- Issue date Jul 22, 2008
- Intel Corporation
- Pascal C. Meier
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method, apparatus and system for inductance modeling in an electric...
- Patent number 7,325,208
- Issue date Jan 29, 2008
- Intel Corporation
- Sourav Chakravarty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Analyzing interconnect structures
- Patent number 7,289,945
- Issue date Oct 30, 2007
- Intel Corporation
- Dan Jiao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hole geometry of a semiconductor package substrate
- Patent number 6,191,472
- Issue date Feb 20, 2001
- Intel Corporation
- Mohiuddin M. Mazumder
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
EXTENDING MULTICHIP PACKAGE LINK OFF PACKAGE
- Publication number 20230073807
- Publication date Mar 9, 2023
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXTENDING MULTICHIP PACKAGE LINK OFF PACKAGE
- Publication number 20210097015
- Publication date Apr 1, 2021
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXTENDING MULTICHIP PACKAGE LINK OFF PACKAGE
- Publication number 20200409896
- Publication date Dec 31, 2020
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH PERFORMANCE INTERCONNECT
- Publication number 20200394151
- Publication date Dec 17, 2020
- Intel Corporation
- Zuoguo Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MICROPROCESSOR PACKAGE WITH FIRST LEVEL DIE BUMP GROUND WEBBING STR...
- Publication number 20180331035
- Publication date Nov 15, 2018
- Yu Amos ZHANG
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
EXTENDING MULTICHIP PACKAGE LINK OFF PACKAGE
- Publication number 20180276164
- Publication date Sep 27, 2018
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH PERFORMANCE INTERCONNECT
- Publication number 20180253398
- Publication date Sep 6, 2018
- Intel Corporation
- Zuoguo Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STANDARDIZED RETIMER
- Publication number 20170351640
- Publication date Dec 7, 2017
- Intel Corporation
- Manisha Nilange
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLEX CABLE AND METHOD FOR MAKING THE SAME
- Publication number 20120081858
- Publication date Apr 5, 2012
- Sanka Ganesan
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Testing microelectronic devices using electro-optic modulator probes
- Publication number 20080122463
- Publication date May 29, 2008
- Sanjay Dabral
- G01 - MEASURING TESTING
Information Patent Application
Circuit board-to-circuit board connectors having electro-optic modu...
- Publication number 20080003842
- Publication date Jan 3, 2008
- Sanjay Dabral
- G02 - OPTICS
Information Patent Application
Technique for blind-mating daughtercard to mainboard
- Publication number 20070238322
- Publication date Oct 11, 2007
- Pascal C. Meier
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Optical debug mechanism
- Publication number 20070237527
- Publication date Oct 11, 2007
- Sanjay Dabral
- G01 - MEASURING TESTING
Information Patent Application
Inductance modeling
- Publication number 20060074617
- Publication date Apr 6, 2006
- Sourav Chakravarty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Analyzing interconnect structures
- Publication number 20040082230
- Publication date Apr 29, 2004
- Dan Jiao
- G06 - COMPUTING CALCULATING COUNTING

Mohiuddin M. Mazumder

Person

Patents Grantslast 30 patents

High performance interconnect

Extending multichip package link off package

Extending multichip package link off package

High performance interconnect

Extending multichip package link off package

Microprocessor package with first level die bump ground webbing str...

Flex cable and method for making the same

Circuit board-to-circuit board connectors having electro-optic modu...

Technique for blind-mating daughtercard to mainboard

Method, apparatus and system for inductance modeling in an electric...

Analyzing interconnect structures

Hole geometry of a semiconductor package substrate

Patents Applicationslast 30 patents

EXTENDING MULTICHIP PACKAGE LINK OFF PACKAGE

EXTENDING MULTICHIP PACKAGE LINK OFF PACKAGE

EXTENDING MULTICHIP PACKAGE LINK OFF PACKAGE

HIGH PERFORMANCE INTERCONNECT

MICROPROCESSOR PACKAGE WITH FIRST LEVEL DIE BUMP GROUND WEBBING STR...

EXTENDING MULTICHIP PACKAGE LINK OFF PACKAGE

HIGH PERFORMANCE INTERCONNECT

STANDARDIZED RETIMER

FLEX CABLE AND METHOD FOR MAKING THE SAME

Testing microelectronic devices using electro-optic modulator probes

Circuit board-to-circuit board connectors having electro-optic modu...

Technique for blind-mating daughtercard to mainboard

Optical debug mechanism

Inductance modeling

Analyzing interconnect structures