Monish Shantilal SHAH

Person

Sammamish, WA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Error rates for memory with built in error correction and detection
- Patent number 12,111,726
- Issue date Oct 8, 2024
- Microsoft Technology Licensing, LLC
- Monish Shah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Distributed raid for parity-based flash storage devices
- Patent number 12,079,084
- Issue date Sep 3, 2024
- Microsoft Technology Licensing, LLC
- Monish Shantilal Shah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Collecting quality of service statistics for in-use child physical...
- Patent number 12,056,372
- Issue date Aug 6, 2024
- Microsoft Technology Licensing, LLC
- Scott Chao-Chueh Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile memory device-assisted live migration of virtual machi...
- Patent number 11,977,785
- Issue date May 7, 2024
- Microsoft Technology Licensing, LLC
- Scott Chao-Chueh Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system with a predictable read latency from media with a lon...
- Patent number 11,775,442
- Issue date Oct 3, 2023
- Microsoft Technology Licensing, LLC
- Monish Shantilal Shah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Two-way interleaving in a three-rank environment
- Patent number 11,726,909
- Issue date Aug 15, 2023
- Microsoft Technology Licensing, LLC
- Brett Kenneth Dodds
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory reduction in a system by oversubscribing physical memory sha...
- Patent number 11,656,981
- Issue date May 23, 2023
- Microsoft Technology Licensing, LLC
- Monish Shantilal Shah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error rates for memory with built in error correction and detection
- Patent number 11,640,334
- Issue date May 2, 2023
- Microsoft Technology Licensing, LLC
- Monish Shah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory reduction in a system by oversubscribing physical memory sha...
- Patent number 11,455,239
- Issue date Sep 27, 2022
- Microsoft Technology Licensing, LLC
- Monish Shantilal Shah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Two-way interleaving in a three-rank environment
- Patent number 11,429,523
- Issue date Aug 30, 2022
- Microsoft Technology Licensing, LLC
- Brett Kenneth Dodds
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Die level data redundancy in solid state storage devices
- Patent number 11,422,886
- Issue date Aug 23, 2022
- Microsoft Technology Licensing, LLC
- Chenfeng Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system with a predictable read latency from media with a lon...
- Patent number 11,269,779
- Issue date Mar 8, 2022
- Microsoft Technology Licensing, LLC
- Monish Shantilal Shah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive spare block usage in solid state drives
- Patent number 11,150,825
- Issue date Oct 19, 2021
- Microsoft Technology Licensing, LLC
- Abhilash Ravi Kashyap
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
ERROR RATES FOR MEMORY WITH BUILT IN ERROR CORRECTION AND DETECTION
- Publication number 20240427664
- Publication date Dec 26, 2024
- Microsoft Technology Licensing, LLC
- Monish SHAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISTRIBUTED RAID FOR PARITY-BASED FLASH STORAGE DEVICES
- Publication number 20240036976
- Publication date Feb 1, 2024
- Microsoft Technology Licensing, LLC
- Monish Shantilal SHAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-VOLATILE MEMORY DEVICE -ASSISTED LIVE MIGRATION OF VIRTUAL MACH...
- Publication number 20230251799
- Publication date Aug 10, 2023
- Microsoft Technology Licensing, LLC
- Scott Chao-Chueh LEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COLLECTING QUALITY OF SERVICE STATISTICS FOR IN-USE CHILD PHYSICAL...
- Publication number 20230244390
- Publication date Aug 3, 2023
- Microsoft Technology Licensing, LLC
- Scott Chao-Chueh LEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR RATES FOR MEMORY WITH BUILT IN ERROR CORRECTION AND DETECTION
- Publication number 20230214295
- Publication date Jul 6, 2023
- Microsoft Technology Licensing, LLC
- Monish SHAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY REDUCTION IN A SYSTEM BY OVERSUBSCRIBING PHYSICAL MEMORY SHA...
- Publication number 20230004488
- Publication date Jan 5, 2023
- Microsoft Technology Licensing, LLC
- Monish Shantilal SHAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR RATES FOR MEMORY WITH BUILT IN ERROR CORRECTION AND DETECTION
- Publication number 20220374307
- Publication date Nov 24, 2022
- Microsoft Technology Licensing, LLC
- Monish SHAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TWO-WAY INTERLEAVING IN A THREE-RANK ENVIRONMENT
- Publication number 20220350737
- Publication date Nov 3, 2022
- Microsoft Technology Licensing, LLC
- Brett Kenneth Dodds
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PLANE SPANNING DATA REDUNDANCY IN SOLID STATE STORAGE DEVICES
- Publication number 20220308960
- Publication date Sep 29, 2022
- Microsoft Technology Licensing, LLC
- Chenfeng Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM WITH A PREDICTABLE READ LATENCY FROM MEDIA WITH A LON...
- Publication number 20220147461
- Publication date May 12, 2022
- Microsoft Technology Licensing, LLC
- Monish Shantilal SHAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM WITH A PREDICTABLE READ LATENCY FROM MEDIA WITH A LON...
- Publication number 20210374066
- Publication date Dec 2, 2021
- Microsoft Technology Licensing, LLC
- Monish Shantilal SHAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TWO-WAY INTERLEAVING IN A THREE-RANK ENVIRONMENT
- Publication number 20210357321
- Publication date Nov 18, 2021
- Microsoft Technology Licensing, LLC
- Brett Kenneth Dodds
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIE LEVEL DATA REDUNDANCY IN SOLID STATE STORAGE DEVICES
- Publication number 20210216399
- Publication date Jul 15, 2021
- Microsoft Technology Licensing, LLC
- Chenfeng Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE SPARE BLOCK USAGE IN SOLID STATE DRIVES
- Publication number 20210173558
- Publication date Jun 10, 2021
- Microsoft Technology Licensing, LLC
- Abhilash Ravi Kashyap
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SOLID-STATE DEVICES TO REDUCE LATENCY BY EMPLOYING INSTRUCTION TIME...
- Publication number 20210149594
- Publication date May 20, 2021
- Microsoft Technology Licensing, LLC
- Monish Shantilal SHAH
- G06 - COMPUTING CALCULATING COUNTING

Monish Shantilal SHAH

Person

Patents Grantslast 30 patents

Error rates for memory with built in error correction and detection

Distributed raid for parity-based flash storage devices

Collecting quality of service statistics for in-use child physical...

Non-volatile memory device-assisted live migration of virtual machi...

Memory system with a predictable read latency from media with a lon...

Two-way interleaving in a three-rank environment

Memory reduction in a system by oversubscribing physical memory sha...

Error rates for memory with built in error correction and detection

Memory reduction in a system by oversubscribing physical memory sha...

Two-way interleaving in a three-rank environment

Die level data redundancy in solid state storage devices

Memory system with a predictable read latency from media with a lon...

Adaptive spare block usage in solid state drives

Patents Applicationslast 30 patents

ERROR RATES FOR MEMORY WITH BUILT IN ERROR CORRECTION AND DETECTION

DISTRIBUTED RAID FOR PARITY-BASED FLASH STORAGE DEVICES

NON-VOLATILE MEMORY DEVICE -ASSISTED LIVE MIGRATION OF VIRTUAL MACH...

COLLECTING QUALITY OF SERVICE STATISTICS FOR IN-USE CHILD PHYSICAL...

ERROR RATES FOR MEMORY WITH BUILT IN ERROR CORRECTION AND DETECTION

MEMORY REDUCTION IN A SYSTEM BY OVERSUBSCRIBING PHYSICAL MEMORY SHA...

ERROR RATES FOR MEMORY WITH BUILT IN ERROR CORRECTION AND DETECTION

TWO-WAY INTERLEAVING IN A THREE-RANK ENVIRONMENT

PLANE SPANNING DATA REDUNDANCY IN SOLID STATE STORAGE DEVICES

MEMORY SYSTEM WITH A PREDICTABLE READ LATENCY FROM MEDIA WITH A LON...

MEMORY SYSTEM WITH A PREDICTABLE READ LATENCY FROM MEDIA WITH A LON...

TWO-WAY INTERLEAVING IN A THREE-RANK ENVIRONMENT

DIE LEVEL DATA REDUNDANCY IN SOLID STATE STORAGE DEVICES

ADAPTIVE SPARE BLOCK USAGE IN SOLID STATE DRIVES

SOLID-STATE DEVICES TO REDUCE LATENCY BY EMPLOYING INSTRUCTION TIME...