Mototsugu Hamada

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Palo Alto, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Semiconductor integrated circuit and source voltage/substrate bias...
- Patent number 7,551,019
- Issue date Jun 23, 2009
- Kabushiki Kaisha Toshiba
- Tetsuya Fujita
- G05 - CONTROLLING REGULATING

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR INTEGRATED CIRCUIT AND SOURCE VOLTAGE/SUBSTRATE BIAS...
- Publication number 20070236276
- Publication date Oct 11, 2007
- KABUSHIKI KAISHA TOSHIBA
- Tetsuya Fujita
- G05 - CONTROLLING REGULATING