Muditha Kanchana

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Cache quota control
- Patent number 11,914,521
- Issue date Feb 27, 2024
- Apple Inc.
- Wolfgang H. Klingauf
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Application aware SoC memory cache partitioning
- Patent number 11,232,033
- Issue date Jan 25, 2022
- Apple Inc.
- Wolfgang H. Klingauf
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel coherence and memory cache processing pipelines
- Patent number 11,138,111
- Issue date Oct 5, 2021
- Apple Inc.
- Muditha Kanchana
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache drop feature to increase memory bandwidth and save power
- Patent number 10,970,223
- Issue date Apr 6, 2021
- Apple Inc.
- Wolfgang H. Klingauf
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache drop feature to increase memory bandwidth and save power
- Patent number 10,289,565
- Issue date May 14, 2019
- Apple Inc.
- Wolfgang H. Klingauf
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power management of cache duplicate tags
- Patent number 9,823,730
- Issue date Nov 21, 2017
- Apple Inc.
- Muditha Kanchana
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Duplicate tag structure employing single-port tag RAM and dual-port...
- Patent number 9,454,482
- Issue date Sep 27, 2016
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power control for cache structures
- Patent number 9,317,102
- Issue date Apr 19, 2016
- Apple Inc.
- Muditha Kanchana
- G11 - INFORMATION STORAGE
Information Patent Grant
Coherence switch for I/O traffic
- Patent number 9,176,913
- Issue date Nov 3, 2015
- Apple Inc.
- Timothy J. Millet
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Debug access mechanism for duplicate tag storage
- Patent number 9,021,306
- Issue date Apr 28, 2015
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
APPLICATION AWARE SOC MEMORY CACHE PARTITIONING
- Publication number 20210034527
- Publication date Feb 4, 2021
- Apple Inc.
- Wolfgang H. Klingauf
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL COHERENCE AND MEMORY CACHE PROCESSING PIPELINES
- Publication number 20200081838
- Publication date Mar 12, 2020
- Apple Inc.
- Muditha Kanchana
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE DROP FEATURE TO INCREASE MEMORY BANDWIDTH AND SAVE POWER
- Publication number 20190266102
- Publication date Aug 29, 2019
- Apple Inc.
- Wolfgang H. Klingauf
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE DROP FEATURE TO INCREASE MEMORY BANDWIDTH AND SAVE POWER
- Publication number 20180349291
- Publication date Dec 6, 2018
- Apple Inc.
- Wolfgang H. Klingauf
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power Management of Cache Duplicate Tags
- Publication number 20170010655
- Publication date Jan 12, 2017
- Apple Inc.
- Muditha Kanchana
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COHERENCE PROCESSING EMPLOYING BLACK BOX DUPLICATE TAGS
- Publication number 20150067246
- Publication date Mar 5, 2015
- Apple Inc.
- Muditha Kanchana
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DUPLICATE TAG STRUCTURE EMPLOYING SINGLE-PORT TAG RAM AND DUAL-PORT...
- Publication number 20150006803
- Publication date Jan 1, 2015
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER CONTROL FOR CACHE STRUCTURES
- Publication number 20140189411
- Publication date Jul 3, 2014
- Apple Inc.
- Muditha Kanchana
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEBUG ACCESS MECHANISM FOR DUPLICATE TAG STORAGE
- Publication number 20140173342
- Publication date Jun 19, 2014
- Apple Inc.
- Harshavardhan Kaushikkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COHERENCE SWITCH FOR I/O TRAFFIC
- Publication number 20130061003
- Publication date Mar 7, 2013
- Timothy J. Millet
- G06 - COMPUTING CALCULATING COUNTING

Muditha Kanchana

Person

Patents Grantslast 30 patents

Cache quota control

Application aware SoC memory cache partitioning

Parallel coherence and memory cache processing pipelines

Cache drop feature to increase memory bandwidth and save power

Cache drop feature to increase memory bandwidth and save power

Power management of cache duplicate tags

Duplicate tag structure employing single-port tag RAM and dual-port...

Power control for cache structures

Coherence switch for I/O traffic

Debug access mechanism for duplicate tag storage

Patents Applicationslast 30 patents

APPLICATION AWARE SOC MEMORY CACHE PARTITIONING

PARALLEL COHERENCE AND MEMORY CACHE PROCESSING PIPELINES

CACHE DROP FEATURE TO INCREASE MEMORY BANDWIDTH AND SAVE POWER

CACHE DROP FEATURE TO INCREASE MEMORY BANDWIDTH AND SAVE POWER

Power Management of Cache Duplicate Tags

COHERENCE PROCESSING EMPLOYING BLACK BOX DUPLICATE TAGS

DUPLICATE TAG STRUCTURE EMPLOYING SINGLE-PORT TAG RAM AND DUAL-PORT...

POWER CONTROL FOR CACHE STRUCTURES

DEBUG ACCESS MECHANISM FOR DUPLICATE TAG STORAGE

COHERENCE SWITCH FOR I/O TRAFFIC