Muhammad M. Khellah

Person

Tigard, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Dual loop digital low drop regulator and current sharing control ap...
- Patent number 11,921,529
- Issue date Mar 5, 2024
- Intel Corporation
- Yi-Chun Shih
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Energy efficient memory array with optimized burst read and write d...
- Patent number 11,908,542
- Issue date Feb 20, 2024
- Intel Corporation
- Charles Augustine
- G11 - INFORMATION STORAGE
Information Patent Grant
Distributed and scalable all-digital low dropout integrated voltage...
- Patent number 11,774,919
- Issue date Oct 3, 2023
- Intel Corporation
- Suyoung Bang
- G05 - CONTROLLING REGULATING
Information Patent Grant
Concurrent compute and ECC for in-memory matrix vector operations
- Patent number 11,513,893
- Issue date Nov 29, 2022
- Intel Corporation
- Somnath Paul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Current steering level-shifter
- Patent number 11,489,526
- Issue date Nov 1, 2022
- Intel Corporation
- Andres Malavasi Mora
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Ultra-deep compute static random access memory with high compute th...
- Patent number 11,450,672
- Issue date Sep 20, 2022
- Intel Corporation
- Charles Augustine
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
All-digital closed loop voltage generator
- Patent number 11,320,888
- Issue date May 3, 2022
- Intel Corporation
- Charles Augustine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
All-digital voltage monitor (ADVM) with single-cycle latency
- Patent number 11,211,935
- Issue date Dec 28, 2021
- Intel Corporation
- Suyoung Bang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for multi-read and multi-write of memory circuit
- Patent number 11,176,994
- Issue date Nov 16, 2021
- Intel Corporation
- Muhammad M. Khellah
- G11 - INFORMATION STORAGE
Information Patent Grant
Reliable digital low dropout voltage regulator
- Patent number 10,908,673
- Issue date Feb 2, 2021
- Intel Corporation
- Pascal Meinerzhagen
- G05 - CONTROLLING REGULATING
Information Patent Grant
Apparatus, video processing unit and method for clustering events i...
- Patent number 10,892,012
- Issue date Jan 12, 2021
- Intel Corporation
- Turbo Majumder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Post synaptic potential-based learning rule
- Patent number 10,878,313
- Issue date Dec 29, 2020
- Intel Corporation
- Charles Augustine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Minimum delay error detection and correction for pulsed latches
- Patent number 10,784,865
- Issue date Sep 22, 2020
- Intel Corporation
- Pascal Meinerzhagen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
All-digital voltage monitor (ADVM) with single-cycle latency
- Patent number 10,784,874
- Issue date Sep 22, 2020
- Intel Corporation
- Suyoung Bang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for multi-read and multi-write of memory circuit
- Patent number 10,755,771
- Issue date Aug 25, 2020
- Intel Corporation
- Muhammad M. Khellah
- G11 - INFORMATION STORAGE
Information Patent Grant
Pre-synaptic learning using delayed causal updates
- Patent number 10,748,060
- Issue date Aug 18, 2020
- Intel Corporation
- Somnath Paul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for switched adaptive clocking
- Patent number 10,707,877
- Issue date Jul 7, 2020
- Intel Corporation
- Turbo Majumder
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dual loop digital low drop regulator and current sharing control ap...
- Patent number 10,698,432
- Issue date Jun 30, 2020
- Intel Corporation
- Yi-Chun Shih
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Low swing bitline for sensing arrays
- Patent number 10,685,688
- Issue date Jun 16, 2020
- Intel Corporation
- Jaydeep P. Kulkarni
- G11 - INFORMATION STORAGE
Information Patent Grant
Current steering level-shifter
- Patent number 10,666,259
- Issue date May 26, 2020
- Intel Corporation
- Andres Malavasi Mora
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and system of temporal-domain feature extraction for automat...
- Patent number 10,665,222
- Issue date May 26, 2020
- Intel Corporation
- Suyoung Bang
- G10 - MUSICAL INSTRUMENTS ACOUSTICS
Information Patent Grant
Technologies for memory management of neural networks with sparse c...
- Patent number 10,635,968
- Issue date Apr 28, 2020
- Intel Corporation
- Somnath Paul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disabling cache portions during low voltage operations
- Patent number 10,528,473
- Issue date Jan 7, 2020
- Intel Corporation
- Christopher Wilkerson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bi-directional multi-mode charge pump
- Patent number 10,511,224
- Issue date Dec 17, 2019
- Intel Corporation
- Jaydeep Kulkarni
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Hybrid compression scheme for efficient storage of synaptic weights...
- Patent number 10,489,702
- Issue date Nov 26, 2019
- Intel Corporation
- Somnath Paul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Charge injector with integrated level shifter for localized mitigat...
- Patent number 10,483,961
- Issue date Nov 19, 2019
- Intel Corporation
- Suyoung Bang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Calibrated biasing of sleep transistor in integrated circuits
- Patent number 10,454,476
- Issue date Oct 22, 2019
- Intel Corporation
- Suyoung Bang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Flip-flop circuit with low-leakage transistors
- Patent number 10,423,203
- Issue date Sep 24, 2019
- Intel Corporation
- Charles Augustine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for data retention and supply noise mitigation using clamps
- Patent number 10,418,076
- Issue date Sep 17, 2019
- Intel Corporation
- Pascal A. Meinerzhagen
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-bit pulsed latch including serial scan chain
- Patent number 10,410,699
- Issue date Sep 10, 2019
- Intel Corporation
- Anupama A. Thaploo
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
MULTI-PORTED REGISTER FILE WITH CFETS
- Publication number 20240053987
- Publication date Feb 15, 2024
- Intel Corporation
- Charles Augustine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Management Agent for Real-Time Interpretable Telemetry
- Publication number 20240005777
- Publication date Jan 4, 2024
- Kshitij Doshi
- G08 - SIGNALLING
Information Patent Application
SRAM WITH P-TYPE ACCESS TRANSISTORS AND COMPLEMENTARY FIELD-EFFECT...
- Publication number 20230284427
- Publication date Sep 7, 2023
- Intel Corporation
- Charles AUGUSTINE
- G11 - INFORMATION STORAGE
Information Patent Application
POWER MANAGEMENT FOR EXECUTION OF MACHINE LEARNING WORKLOADS
- Publication number 20230273832
- Publication date Aug 31, 2023
- Intel Corporation
- Somnath Paul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UNIFIED RETENTION AND WAKE-UP CLAMP APPARATUS AND METHOD
- Publication number 20220091652
- Publication date Mar 24, 2022
- Intel Corporation
- Charles Augustine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuits And Methods For Supply Voltage Detection And Timing Monito...
- Publication number 20220006459
- Publication date Jan 6, 2022
- Intel Corporation
- Miguel Bautista Gabriel
- G01 - MEASURING TESTING
Information Patent Application
PARALLEL PRUNING AND BATCH SORTING FOR SIMILARITY SEARCH ACCELERATORS
- Publication number 20210319022
- Publication date Oct 14, 2021
- Intel Corporation
- Srajudheen Makkadayil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALL-DIGITAL VOLTAGE MONITOR (ADVM) WITH SINGLE-CYCLE LATENCY
- Publication number 20210242872
- Publication date Aug 5, 2021
- Intel Corporation
- Suyoung Bang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DISTRIBUTED AND SCALABLE ALL-DIGITAL LOW DROPOUT INTEGRATED VOLTAGE...
- Publication number 20210240142
- Publication date Aug 5, 2021
- Intel Corporation
- Suyoung Bang
- G05 - CONTROLLING REGULATING
Information Patent Application
ENERGY EFFICIENT MEMORY ARRAY WITH OPTIMIZED BURST READ AND WRITE D...
- Publication number 20210193196
- Publication date Jun 24, 2021
- Intel Corporation
- Charles Augustine
- G11 - INFORMATION STORAGE
Information Patent Application
CONCURRENT COMPUTE AND ECC FOR IN-MEMORY MATRIX VECTOR OPERATIONS
- Publication number 20210109809
- Publication date Apr 15, 2021
- Intel Corporation
- Somnath Paul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR MULTI-READ AND MULTI-WRITE OF MEMORY CIRCUIT
- Publication number 20210043251
- Publication date Feb 11, 2021
- Intel Corporation
- Muhammad M. Khellah
- G11 - INFORMATION STORAGE
Information Patent Application
DUAL LOOP DIGITAL LOW DROP REGULATOR AND CURRENT SHARING CONTROL AP...
- Publication number 20200393861
- Publication date Dec 17, 2020
- Intel Corporation
- Yi-Chun Shih
- G05 - CONTROLLING REGULATING
Information Patent Application
CURRENT STEERING LEVEL-SHIFTER
- Publication number 20200358443
- Publication date Nov 12, 2020
- Intel Corporation
- Andres Malavasi Mora
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ULTRA-DEEP COMPUTE STATIC RANDOM ACCESS MEMORY WITH HIGH COMPUTE TH...
- Publication number 20200258890
- Publication date Aug 13, 2020
- Intel Corporation
- Charles AUGUSTINE
- G11 - INFORMATION STORAGE
Information Patent Application
NEAREST NEIGHBOR SEARCH LOGIC CIRCUIT WITH REDUCED LATENCY AND POWE...
- Publication number 20200183922
- Publication date Jun 11, 2020
- Intel Corporation
- Wootaek LIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NVRAM SYSTEM MEMORY WITH MEMORY SIDE CACHE THAT FAVORS WRITTEN TO I...
- Publication number 20200133884
- Publication date Apr 30, 2020
- Intel Corporation
- Zeshan A. CHISHTI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALL-DIGITAL CLOSED LOOP VOLTAGE GENERATOR
- Publication number 20200081512
- Publication date Mar 12, 2020
- Intel Corporation
- Charles Augustine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM OF EVENT-DRIVEN OBJECT SEGMENTATION FOR IMAGE PRO...
- Publication number 20200005468
- Publication date Jan 2, 2020
- Intel Corporation
- Somnath Paul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH DENSITY NEGATIVE DIFFERENTIAL RESISTANCE BASED MEMORY
- Publication number 20190385657
- Publication date Dec 19, 2019
- Intel Corporation
- Charles Augustine
- G11 - INFORMATION STORAGE
Information Patent Application
CHARGE INJECTOR WITH INTEGRATED LEVEL SHIFTER FOR LOCALIZED MITIGAT...
- Publication number 20190288681
- Publication date Sep 19, 2019
- Intel Corporation
- Suyoung Bang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
RELIABLE DIGITAL LOW DROPOUT VOLTAGE REGULATOR
- Publication number 20190243440
- Publication date Aug 8, 2019
- Intel Corporation
- Pascal Meinerzhagen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW SWING BITLINE FOR SENSING ARRAYS
- Publication number 20190206456
- Publication date Jul 4, 2019
- Intel Corporation
- Jaydeep P. Kulkarni
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR MULTI-READ AND MULTI-WRITE OF MEMORY CIRCUIT
- Publication number 20190198093
- Publication date Jun 27, 2019
- Intel Corporation
- Muhammad M. Khellah
- G11 - INFORMATION STORAGE
Information Patent Application
DETECTING KEYWORDS IN AUDIO USING A SPIKING NEURAL NETWORK
- Publication number 20190115011
- Publication date Apr 18, 2019
- Intel Corporation
- Muhammad Khellah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CALIBRATED BIASING OF SLEEP TRANSISTOR IN INTEGRATED CIRCUITS
- Publication number 20190044512
- Publication date Feb 7, 2019
- Intel Corporation
- Suyoung Bang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND SYSTEM OF TEMPORAL-DOMAIN FEATURE EXTRACTION FOR AUTOMAT...
- Publication number 20190043477
- Publication date Feb 7, 2019
- Intel Corporation
- Suyoung Bang
- G10 - MUSICAL INSTRUMENTS ACOUSTICS
Information Patent Application
CLUSTERING EVENTS IN A CONTENT ADDRESSABLE MEMORY
- Publication number 20190043583
- Publication date Feb 7, 2019
- Intel Corporation
- Turbo MAJUMDER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AGING AWARE DYNAMIC KEEPER APPARATUS AND ASSOCIATED METHOD
- Publication number 20180342289
- Publication date Nov 29, 2018
- Intel Corporation
- Jaydeep P. KULKARNI
- G11 - INFORMATION STORAGE
Information Patent Application
POST SYNAPTIC POTENTIAL-BASED LEARNING RULE
- Publication number 20180322384
- Publication date Nov 8, 2018
- Intel Corporation
- Charles Augustine
- G06 - COMPUTING CALCULATING COUNTING

Muhammad M. Khellah

Person

Patents Grantslast 30 patents

Dual loop digital low drop regulator and current sharing control ap...

Energy efficient memory array with optimized burst read and write d...

Distributed and scalable all-digital low dropout integrated voltage...

Concurrent compute and ECC for in-memory matrix vector operations

Current steering level-shifter

Ultra-deep compute static random access memory with high compute th...

All-digital closed loop voltage generator

All-digital voltage monitor (ADVM) with single-cycle latency

Techniques for multi-read and multi-write of memory circuit

Reliable digital low dropout voltage regulator

Apparatus, video processing unit and method for clustering events i...

Post synaptic potential-based learning rule

Minimum delay error detection and correction for pulsed latches

All-digital voltage monitor (ADVM) with single-cycle latency

Techniques for multi-read and multi-write of memory circuit

Pre-synaptic learning using delayed causal updates

Method and apparatus for switched adaptive clocking

Dual loop digital low drop regulator and current sharing control ap...

Low swing bitline for sensing arrays

Current steering level-shifter

Method and system of temporal-domain feature extraction for automat...

Technologies for memory management of neural networks with sparse c...

Disabling cache portions during low voltage operations

Bi-directional multi-mode charge pump

Hybrid compression scheme for efficient storage of synaptic weights...

Charge injector with integrated level shifter for localized mitigat...

Calibrated biasing of sleep transistor in integrated circuits

Flip-flop circuit with low-leakage transistors

Apparatus for data retention and supply noise mitigation using clamps

Multi-bit pulsed latch including serial scan chain

Patents Applicationslast 30 patents

MULTI-PORTED REGISTER FILE WITH CFETS

Management Agent for Real-Time Interpretable Telemetry

SRAM WITH P-TYPE ACCESS TRANSISTORS AND COMPLEMENTARY FIELD-EFFECT...

POWER MANAGEMENT FOR EXECUTION OF MACHINE LEARNING WORKLOADS

UNIFIED RETENTION AND WAKE-UP CLAMP APPARATUS AND METHOD

Circuits And Methods For Supply Voltage Detection And Timing Monito...

PARALLEL PRUNING AND BATCH SORTING FOR SIMILARITY SEARCH ACCELERATORS

ALL-DIGITAL VOLTAGE MONITOR (ADVM) WITH SINGLE-CYCLE LATENCY

DISTRIBUTED AND SCALABLE ALL-DIGITAL LOW DROPOUT INTEGRATED VOLTAGE...

ENERGY EFFICIENT MEMORY ARRAY WITH OPTIMIZED BURST READ AND WRITE D...

CONCURRENT COMPUTE AND ECC FOR IN-MEMORY MATRIX VECTOR OPERATIONS

TECHNIQUES FOR MULTI-READ AND MULTI-WRITE OF MEMORY CIRCUIT

DUAL LOOP DIGITAL LOW DROP REGULATOR AND CURRENT SHARING CONTROL AP...

CURRENT STEERING LEVEL-SHIFTER

ULTRA-DEEP COMPUTE STATIC RANDOM ACCESS MEMORY WITH HIGH COMPUTE TH...

NEAREST NEIGHBOR SEARCH LOGIC CIRCUIT WITH REDUCED LATENCY AND POWE...

NVRAM SYSTEM MEMORY WITH MEMORY SIDE CACHE THAT FAVORS WRITTEN TO I...

ALL-DIGITAL CLOSED LOOP VOLTAGE GENERATOR

METHOD AND SYSTEM OF EVENT-DRIVEN OBJECT SEGMENTATION FOR IMAGE PRO...

HIGH DENSITY NEGATIVE DIFFERENTIAL RESISTANCE BASED MEMORY

CHARGE INJECTOR WITH INTEGRATED LEVEL SHIFTER FOR LOCALIZED MITIGAT...

RELIABLE DIGITAL LOW DROPOUT VOLTAGE REGULATOR

LOW SWING BITLINE FOR SENSING ARRAYS

TECHNIQUES FOR MULTI-READ AND MULTI-WRITE OF MEMORY CIRCUIT

DETECTING KEYWORDS IN AUDIO USING A SPIKING NEURAL NETWORK

CALIBRATED BIASING OF SLEEP TRANSISTOR IN INTEGRATED CIRCUITS

METHOD AND SYSTEM OF TEMPORAL-DOMAIN FEATURE EXTRACTION FOR AUTOMAT...

CLUSTERING EVENTS IN A CONTENT ADDRESSABLE MEMORY

AGING AWARE DYNAMIC KEEPER APPARATUS AND ASSOCIATED METHOD

POST SYNAPTIC POTENTIAL-BASED LEARNING RULE