Mustafa Nazmi Kaynak

Person

Tempe, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Managing compensation for cell-to-cell coupling and lateral migrati...
- Patent number 12,119,062
- Issue date Oct 15, 2024
- Micron Technology, Inc.
- Mustafa N. Kaynak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Code rate as function of logical saturation
- Patent number 12,099,725
- Issue date Sep 24, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reduction of errors in data retrieved from a memory device to apply...
- Patent number 12,086,028
- Issue date Sep 10, 2024
- Micron Technology, Inc.
- Sivagnanam Parthasarathy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing compensation for cell-to-cell coupling and lateral migrati...
- Patent number 12,087,374
- Issue date Sep 10, 2024
- Micron Technology, Inc.
- Mustafa N. Kaynak
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage calibration scans to reduce memory device overhead
- Patent number 12,057,185
- Issue date Aug 6, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing compensation for charge coupling and lateral migration in...
- Patent number 12,046,298
- Issue date Jul 23, 2024
- Micron Technology, Inc.
- Mustafa N. Kaynak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing program verify voltage offsets for charge coupling and lat...
- Patent number 12,046,307
- Issue date Jul 23, 2024
- Micron Technology, Inc.
- Mustafa N. Kaynak
- G11 - INFORMATION STORAGE
Information Patent Grant
Error correction with syndrome computation in a memory device
- Patent number 12,032,444
- Issue date Jul 9, 2024
- Micron Technology, Inc.
- Mustafa N. Kaynak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Separation of parity columns in bit-flip decoding of low-density pa...
- Patent number 12,014,071
- Issue date Jun 18, 2024
- Micron Technology, Inc.
- Eyal En Gad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scaled bit flip thresholds across columns for irregular low density...
- Patent number 11,996,860
- Issue date May 28, 2024
- Micron Technology, Inc.
- Eyal En Gad
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-layer code rate architecture for special event protection wit...
- Patent number 11,994,947
- Issue date May 28, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adjustment of code rate as function of memory endurance state metric
- Patent number 11,983,067
- Issue date May 14, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage bin calibration based on a voltage distribution reference v...
- Patent number 11,966,616
- Issue date Apr 23, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory compaction management in memory devices
- Patent number 11,934,266
- Issue date Mar 19, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing voltage bin selection for blocks of a memory device
- Patent number 11,928,347
- Issue date Mar 12, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Iterative decoder with a dynamic maximum stop condition
- Patent number 11,923,867
- Issue date Mar 5, 2024
- Micron Technology, Inc.
- Sivagnanam Parthasarathy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Stall mitigation in iterative decoders
- Patent number 11,923,868
- Issue date Mar 5, 2024
- Micron Technology, Inc.
- Mustafa N. Kaynak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Error avoidance based on voltage distribution parameters of block f...
- Patent number 11,915,776
- Issue date Feb 27, 2024
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Grant
Stall detection and mitigation in iterative decoders
- Patent number 11,901,911
- Issue date Feb 13, 2024
- Micron Technology, Inc.
- Mustafa N. Kaynak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Block family-based error avoidance for memory devices
- Patent number 11,886,726
- Issue date Jan 30, 2024
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing workload of programming sets of pages to memory device
- Patent number 11,886,336
- Issue date Jan 30, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Descrambling of scrambled linear codewords using non-linear scramblers
- Patent number 11,886,718
- Issue date Jan 30, 2024
- Micron Technology, Inc.
- Patrick Robert Khayat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adjusting pass-through voltage based on threshold voltage shift
- Patent number 11,869,605
- Issue date Jan 9, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G11 - INFORMATION STORAGE
Information Patent Grant
Providing recovered data to a new memory cell at a memory sub-syste...
- Patent number 11,868,639
- Issue date Jan 9, 2024
- Micron Technology, Inc.
- Sampath K. Ratnam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Temperature-compensated time estimate for a block to reach a unifor...
- Patent number 11,854,649
- Issue date Dec 26, 2023
- Micron Technology, Inc.
- Patrick R. Khayat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing bin placement for block families of a memory device based...
- Patent number 11,847,317
- Issue date Dec 19, 2023
- Micron Technology, Inc.
- Shane Nowell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing error-handling flows in memory devices
- Patent number 11,837,307
- Issue date Dec 5, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage offset bin selection by die group for memory devices
- Patent number 11,837,291
- Issue date Dec 5, 2023
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-layer code rate architecture for copyback between partitions...
- Patent number 11,829,245
- Issue date Nov 28, 2023
- Micron Technology, Inc.
- Mustafa N. Kaynak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determining voltage offsets for memory read operations
- Patent number 11,823,722
- Issue date Nov 21, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MANAGING PROGRAM VERIFY VOLTAGE OFFSETS FOR CHARGE COUPLING AND LAT...
- Publication number 20240347119
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Mustafa N. Kaynak
- G11 - INFORMATION STORAGE
Information Patent Application
Separation of Parity Columns in Bit-Flip Decoding of Low-Density Pa...
- Publication number 20240338146
- Publication date Oct 10, 2024
- Micron Technology, Inc.
- Eyal En Gad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING COMPENSATION FOR CHARGE COUPLING AND LATERAL MIGRATION IN...
- Publication number 20240331778
- Publication date Oct 3, 2024
- Micron Technology, Inc.
- Mustafa N. Kaynak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETECTING A STALL CONDITION IN BIT FLIPPING DECODING USING SYNDROME...
- Publication number 20240275407
- Publication date Aug 15, 2024
- Micron Technology, Inc.
- Mustafa N. Kaynak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PREVENTING BACK-TO-BACK FLIPS OF A BIT IN BIT FLIPPING DECODING
- Publication number 20240256328
- Publication date Aug 1, 2024
- Micron Technology, Inc.
- Mustafa N. Kaynak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADJUSTMENT OF CODE RATE AS FUNCTION OF MEMORY ENDURANCE STATE METRIC
- Publication number 20240232013
- Publication date Jul 11, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VOLTAGE BIN CALIBRATION BASED ON A VOLTAGE DISTRIBUTION REFERENCE V...
- Publication number 20240231676
- Publication date Jul 11, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BIT FLIPPING DECODER WITH OPTIMIZED MAXIMUM ITERATIONS FOR VARIED B...
- Publication number 20240176509
- Publication date May 30, 2024
- Micron Technology, Inc.
- Mustafa N. Kaynak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY COMPACTION MANAGEMENT IN MEMORY DEVICES
- Publication number 20240176698
- Publication date May 30, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT MEMORY USE TO SUPPORT SOFT INFORMATION IN BIT FLIPPING DE...
- Publication number 20240168847
- Publication date May 23, 2024
- Micron Technology, Inc.
- Mustafa N. KAYNAK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DESCRAMBLING OF SCRAMBLED LINEAR CODEWORDS USING NON-LINEAR SCRAMBLERS
- Publication number 20240160363
- Publication date May 16, 2024
- Micron Technology, Inc.
- Patrick Robert Khayat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BYPASSING ITERATIONS IN A BIT FLIPPING DECODER USING A LEAST RELIAB...
- Publication number 20240154625
- Publication date May 9, 2024
- Micron Technology, Inc.
- Mustafa N. Kaynak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
BLOCK FAMILY-BASED ERROR AVOIDANCE FOR MEMORY DEVICES
- Publication number 20240111445
- Publication date Apr 4, 2024
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROVIDING RECOVERED DATA TO A NEW MEMORY CELL AT A MEMORY SUB-SYSTE...
- Publication number 20240103749
- Publication date Mar 28, 2024
- Micron Technology, Inc.
- Sampath K. Ratnam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-LAYER CODE RATE ARCHITECTURE FOR COPYBACK BETWEEN PARTITIONS...
- Publication number 20240086282
- Publication date Mar 14, 2024
- Micron Technology, Inc.
- Mustafa N. Kaynak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEMPERATURE-COMPENSATED TIME ESTIMATE FOR A BLOCK TO REACH A UNIFOR...
- Publication number 20240079035
- Publication date Mar 7, 2024
- Micron Technology, Inc.
- Patrick R. Khayat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADJUSTMENT OF CODE RATE AS FUNCTION OF MEMORY ENDURANCE STATE METRIC
- Publication number 20240070023
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STALL MITIGATION IN ITERATIVE DECODERS
- Publication number 20240063820
- Publication date Feb 22, 2024
- Micron Technology, Inc.
- Mustafa N. Kaynak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ITERATIVE DECODER WITH A DYNAMIC MAXIMUM STOP CONDITION
- Publication number 20240063819
- Publication date Feb 22, 2024
- Micron Technology, Inc.
- Sivagnanam Parthasarathy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CODE RATE AS FUNCTION OF LOGICAL SATURATION
- Publication number 20240061589
- Publication date Feb 22, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STALL DETECTION AND MITIGATION IN ITERATIVE DECODERS
- Publication number 20240063818
- Publication date Feb 22, 2024
- Micron Technology, Inc.
- Mustafa N. Kaynak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MULTI-LAYER CODE RATE ARCHITECTURE FOR SPECIAL EVENT PROTECTION WIT...
- Publication number 20240054048
- Publication date Feb 15, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING COMPENSATION FOR CELL-TO-CELL COUPLING AND LATERAL MIGRATI...
- Publication number 20240055061
- Publication date Feb 15, 2024
- Micron Technology, Inc.
- Mustafa N. Kaynak
- G11 - INFORMATION STORAGE
Information Patent Application
MANAGING COMPENSATION FOR CELL-TO-CELL COUPLING AND LATERAL MIGRATI...
- Publication number 20240055050
- Publication date Feb 15, 2024
- Micron Technology, Inc.
- Mustafa N. Kaynak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEASUREMENT OF REPRESENTATIVE CHARGE LOSS IN A BLOCK TO DETERMINE C...
- Publication number 20240004567
- Publication date Jan 4, 2024
- Micron Technology, Inc.
- Patrick R. Khayat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING PROGRAM VERIFY VOLTAGE OFFSETS FOR CHARGE COUPLING AND LAT...
- Publication number 20230395168
- Publication date Dec 7, 2023
- Micron Technology, Inc.
- Mustafa N. Kaynak
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY COMPACTION MANAGEMENT IN MEMORY DEVICES
- Publication number 20230393938
- Publication date Dec 7, 2023
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING COMPENSATION FOR CHARGE COUPLING AND LATERAL MIGRATION IN...
- Publication number 20230395161
- Publication date Dec 7, 2023
- Micron Technology, Inc.
- Mustafa N. Kaynak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALED BIT FLIP THRESHOLDS ACROSS COLUMNS FOR IRREGULAR LOW DENSITY...
- Publication number 20230396269
- Publication date Dec 7, 2023
- Micron Technology, Inc.
- Eyal En Gad
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
EARLY STOPPING OF BIT-FLIP LOW DENSITY PARITY CHECK DECODING BASED...
- Publication number 20230396271
- Publication date Dec 7, 2023
- Micron Technology, Inc.
- Eyal En Gad
- H03 - BASIC ELECTRONIC CIRCUITRY

Mustafa Nazmi Kaynak

Person

Patents Grantslast 30 patents

Managing compensation for cell-to-cell coupling and lateral migrati...

Code rate as function of logical saturation

Reduction of errors in data retrieved from a memory device to apply...

Managing compensation for cell-to-cell coupling and lateral migrati...

Voltage calibration scans to reduce memory device overhead

Managing compensation for charge coupling and lateral migration in...

Managing program verify voltage offsets for charge coupling and lat...

Error correction with syndrome computation in a memory device

Separation of parity columns in bit-flip decoding of low-density pa...

Scaled bit flip thresholds across columns for irregular low density...

Multi-layer code rate architecture for special event protection wit...

Adjustment of code rate as function of memory endurance state metric

Voltage bin calibration based on a voltage distribution reference v...

Memory compaction management in memory devices

Managing voltage bin selection for blocks of a memory device

Iterative decoder with a dynamic maximum stop condition

Stall mitigation in iterative decoders

Error avoidance based on voltage distribution parameters of block f...

Stall detection and mitigation in iterative decoders

Block family-based error avoidance for memory devices

Managing workload of programming sets of pages to memory device

Descrambling of scrambled linear codewords using non-linear scramblers

Adjusting pass-through voltage based on threshold voltage shift

Providing recovered data to a new memory cell at a memory sub-syste...

Temperature-compensated time estimate for a block to reach a unifor...

Managing bin placement for block families of a memory device based...

Managing error-handling flows in memory devices

Voltage offset bin selection by die group for memory devices

Multi-layer code rate architecture for copyback between partitions...

Determining voltage offsets for memory read operations

Patents Applicationslast 30 patents

MANAGING PROGRAM VERIFY VOLTAGE OFFSETS FOR CHARGE COUPLING AND LAT...

Separation of Parity Columns in Bit-Flip Decoding of Low-Density Pa...

MANAGING COMPENSATION FOR CHARGE COUPLING AND LATERAL MIGRATION IN...

DETECTING A STALL CONDITION IN BIT FLIPPING DECODING USING SYNDROME...

PREVENTING BACK-TO-BACK FLIPS OF A BIT IN BIT FLIPPING DECODING

ADJUSTMENT OF CODE RATE AS FUNCTION OF MEMORY ENDURANCE STATE METRIC

VOLTAGE BIN CALIBRATION BASED ON A VOLTAGE DISTRIBUTION REFERENCE V...

BIT FLIPPING DECODER WITH OPTIMIZED MAXIMUM ITERATIONS FOR VARIED B...

MEMORY COMPACTION MANAGEMENT IN MEMORY DEVICES

EFFICIENT MEMORY USE TO SUPPORT SOFT INFORMATION IN BIT FLIPPING DE...

DESCRAMBLING OF SCRAMBLED LINEAR CODEWORDS USING NON-LINEAR SCRAMBLERS

BYPASSING ITERATIONS IN A BIT FLIPPING DECODER USING A LEAST RELIAB...

BLOCK FAMILY-BASED ERROR AVOIDANCE FOR MEMORY DEVICES

PROVIDING RECOVERED DATA TO A NEW MEMORY CELL AT A MEMORY SUB-SYSTE...

MULTI-LAYER CODE RATE ARCHITECTURE FOR COPYBACK BETWEEN PARTITIONS...

TEMPERATURE-COMPENSATED TIME ESTIMATE FOR A BLOCK TO REACH A UNIFOR...

ADJUSTMENT OF CODE RATE AS FUNCTION OF MEMORY ENDURANCE STATE METRIC

STALL MITIGATION IN ITERATIVE DECODERS

ITERATIVE DECODER WITH A DYNAMIC MAXIMUM STOP CONDITION

CODE RATE AS FUNCTION OF LOGICAL SATURATION

STALL DETECTION AND MITIGATION IN ITERATIVE DECODERS

MULTI-LAYER CODE RATE ARCHITECTURE FOR SPECIAL EVENT PROTECTION WIT...

MANAGING COMPENSATION FOR CELL-TO-CELL COUPLING AND LATERAL MIGRATI...

MANAGING COMPENSATION FOR CELL-TO-CELL COUPLING AND LATERAL MIGRATI...

MEASUREMENT OF REPRESENTATIVE CHARGE LOSS IN A BLOCK TO DETERMINE C...

MANAGING PROGRAM VERIFY VOLTAGE OFFSETS FOR CHARGE COUPLING AND LAT...

MEMORY COMPACTION MANAGEMENT IN MEMORY DEVICES

MANAGING COMPENSATION FOR CHARGE COUPLING AND LATERAL MIGRATION IN...

SCALED BIT FLIP THRESHOLDS ACROSS COLUMNS FOR IRREGULAR LOW DENSITY...

EARLY STOPPING OF BIT-FLIP LOW DENSITY PARITY CHECK DECODING BASED...