Myron Shak

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Router architecture for multi-dimensional topologies in on-chip and...
- Patent number 12,095,653
- Issue date Sep 17, 2024
- Applied Materials, Inc.
- Tameesh Suri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Coordinating power transitions between a smart interconnect and het...
- Patent number 11,947,972
- Issue date Apr 2, 2024
- SHENZHEN CHIPULLER CHIP TECHNOLOGY CO., LTD
- Meng Yan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable network-on-package for connecting chiplet-based designs
- Patent number 11,488,935
- Issue date Nov 1, 2022
- Applied Materials, Inc.
- Naveed Zaman
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for dynamic routing using heterogeneous and di...
- Patent number 11,418,196
- Issue date Aug 16, 2022
- SHENZHEN CHIPULLER CHIP TECHNOLOGY CO., LTD
- Meng Yan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Coordinating power transitions between a smart interconnect and het...
- Patent number 11,113,076
- Issue date Sep 7, 2021
- North Sea Investment Co. Ltd.
- Meng Yan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for reducing processor power consumption
- Patent number 8,347,132
- Issue date Jan 1, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Lee-Chung Lu
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...

Patents Applicationslast 30 patents

Information Patent Application
ROUTER ARCHITECTURE FOR MULTI-DIMENSIONAL TOPOLOGIES IN ON-CHIP AND...
- Publication number 20220400073
- Publication date Dec 15, 2022
- Applied Materials, Inc.
- Tameesh Suri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC ACTIVATION SPARSITY IN NEURAL NETWORKS
- Publication number 20220383121
- Publication date Dec 1, 2022
- Applied Materials, Inc.
- Tameesh Suri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE NETWORK-ON-PACKAGE FOR CONNECTING CHIPLET-BASED DESIGNS
- Publication number 20220359464
- Publication date Nov 10, 2022
- Applied Materials, Inc.
- Naveed Zaman
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR DYNAMIC ROUTING USING HETEROGENEOUS AND DI...
- Publication number 20220329245
- Publication date Oct 13, 2022
- Shenzhen Chipuller Chip Technology Co., LTD.
- Meng Yan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COORDINATING POWER TRANSITIONS BETWEEN A SMART INTERCONNECT AND HET...
- Publication number 20210365273
- Publication date Nov 25, 2021
- North Sea Investment Co. Ltd.
- Meng YAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR DYNAMIC ROUTING USING HETEROGENEOUS AND DI...
- Publication number 20210126641
- Publication date Apr 29, 2021
- North Sea Investment Co. Ltd.
- Meng YAN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COORDINATING POWER TRANSITIONS BETWEEN A SMART INTERCONNECT AND HET...
- Publication number 20190108043
- Publication date Apr 11, 2019
- zGlue, Inc.
- Meng YAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Reducing Processor Power Consumption
- Publication number 20100174933
- Publication date Jul 8, 2010
- Lee-Chung Lu
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Router architecture for multi-dimensional topologies in on-chip and...

Coordinating power transitions between a smart interconnect and het...

Scalable network-on-package for connecting chiplet-based designs

Method and apparatus for dynamic routing using heterogeneous and di...

Coordinating power transitions between a smart interconnect and het...

System and method for reducing processor power consumption

Patents Applicationslast 30 patents

ROUTER ARCHITECTURE FOR MULTI-DIMENSIONAL TOPOLOGIES IN ON-CHIP AND...

DYNAMIC ACTIVATION SPARSITY IN NEURAL NETWORKS

SCALABLE NETWORK-ON-PACKAGE FOR CONNECTING CHIPLET-BASED DESIGNS

METHOD AND APPARATUS FOR DYNAMIC ROUTING USING HETEROGENEOUS AND DI...

COORDINATING POWER TRANSITIONS BETWEEN A SMART INTERCONNECT AND HET...

METHOD AND APPARATUS FOR DYNAMIC ROUTING USING HETEROGENEOUS AND DI...

COORDINATING POWER TRANSITIONS BETWEEN A SMART INTERCONNECT AND HET...

System and Method for Reducing Processor Power Consumption