Nace Layadi

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Zone polishing using variable slurry solid content
- Patent number 7,163,438
- Issue date Jan 16, 2007
- Chartered Semiconductor Manufacturing Ltd.
- Alvaro Maury
- B24 - GRINDING POLISHING
Information Patent Grant
Zone polishing using variable slurry solid content
- Patent number 6,984,166
- Issue date Jan 10, 2006
- Chartered Semiconductor Manufacturing Ltd.
- Alvaro Maury
- B24 - GRINDING POLISHING
Information Patent Grant
Multi-layered semiconductor structure
- Patent number 6,977,128
- Issue date Dec 20, 2005
- Agere Systems Inc.
- David M. Boulin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Contact for use in an integrated circuit and a method of manufactur...
- Patent number 6,910,907
- Issue date Jun 28, 2005
- Agere Systems Inc.
- Nace Layadi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
IMP TiN barrier metal process
- Patent number 6,821,886
- Issue date Nov 23, 2004
- Chartered Semiconductor Manufacturing Ltd.
- Nace Layadi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of dry etching a semiconductor device in the absence of a pl...
- Patent number 6,730,600
- Issue date May 4, 2004
- Agere Systems, INC
- Nace Layadi
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Method of forming an alignment feature in or on a multi-layered sem...
- Patent number 6,706,609
- Issue date Mar 16, 2004
- Agere Systems Inc.
- David M. Boulin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for cleaning tungsten from deposition wall chambers
- Patent number 6,585,830
- Issue date Jul 1, 2003
- Agere Systems Inc.
- Nace Layadi
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Method of forming an alignment feature in or on a multilayered semi...
- Patent number 6,576,529
- Issue date Jun 10, 2003
- Agere Systems Inc.
- David M. Boulin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for reducing a metal seam in an interconnect structure and a...
- Patent number 6,548,906
- Issue date Apr 15, 2003
- Agere Systems Inc.
- Nace Layadi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Two phase chemical/mechanical polishing process for tungsten layers
- Patent number 6,436,829
- Issue date Aug 20, 2002
- Agere Systems Guardian Corp.
- Nace Layadi
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Zone polishing using variable slurry solid content
- Publication number 20050277372
- Publication date Dec 15, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Alvaro Maury
- B24 - GRINDING POLISHING
Information Patent Application
Method to monitor silicide formation on product wafers
- Publication number 20050134857
- Publication date Jun 23, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Alvaro Maury
- G01 - MEASURING TESTING
Information Patent Application
CONTACT FOR USE IN AN INTEGRATED CIRCUIT AND A METHOD OF MANUFACTUR...
- Publication number 20050106919
- Publication date May 19, 2005
- Agere Systems Inc.
- Nace Layadi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Trench isolation structure and method of manufacture therefor
- Publication number 20050106835
- Publication date May 19, 2005
- Agere Systems Inc.
- Nace Layadi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Zone polishing using variable slurry solid content
- Publication number 20050026549
- Publication date Feb 3, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Alvaro Maury
- B24 - GRINDING POLISHING
Information Patent Application
Multi-layered semiconductor structure
- Publication number 20040094847
- Publication date May 20, 2004
- David M. Boulin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF DRY ETCHING A SEMICONDUCTOR DEVICE IN THE ABSENCE OF A PL...
- Publication number 20040063315
- Publication date Apr 1, 2004
- Nace Layadi
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
Method for metal patterning and improved linewidth control
- Publication number 20030228755
- Publication date Dec 11, 2003
- Thomas Craig Esry
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
METHOD FOR REDUCING A METAL SEAM IN AN INTERCONNECT STRUCTURE AND A...
- Publication number 20030038369
- Publication date Feb 27, 2003
- Nace Layadi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Polish or etch stop layer
- Publication number 20020180052
- Publication date Dec 5, 2002
- Nace Layadi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for cleaning tungsten from deposition wall chambers
- Publication number 20020062846
- Publication date May 30, 2002
- Nace Layadi
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
Method of forming an alignment feature in or on a multi-layered sem...
- Publication number 20020004283
- Publication date Jan 10, 2002
- David M. Boulin
- H01 - BASIC ELECTRIC ELEMENTS

Nace Layadi

Person

Patents Grantslast 30 patents

Zone polishing using variable slurry solid content

Zone polishing using variable slurry solid content

Multi-layered semiconductor structure

Contact for use in an integrated circuit and a method of manufactur...

IMP TiN barrier metal process

Method of dry etching a semiconductor device in the absence of a pl...

Method of forming an alignment feature in or on a multi-layered sem...

Method for cleaning tungsten from deposition wall chambers

Method of forming an alignment feature in or on a multilayered semi...

Method for reducing a metal seam in an interconnect structure and a...

Two phase chemical/mechanical polishing process for tungsten layers

Patents Applicationslast 30 patents

Zone polishing using variable slurry solid content

Method to monitor silicide formation on product wafers

CONTACT FOR USE IN AN INTEGRATED CIRCUIT AND A METHOD OF MANUFACTUR...

Trench isolation structure and method of manufacture therefor

Zone polishing using variable slurry solid content

Multi-layered semiconductor structure

METHOD OF DRY ETCHING A SEMICONDUCTOR DEVICE IN THE ABSENCE OF A PL...

Method for metal patterning and improved linewidth control

METHOD FOR REDUCING A METAL SEAM IN AN INTERCONNECT STRUCTURE AND A...

Polish or etch stop layer

Method for cleaning tungsten from deposition wall chambers

Method of forming an alignment feature in or on a multi-layered sem...