Nancy Pratt

Person

Essex, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and system for enumerating digital circuits in a system-on-a...
- Patent number 10,628,375
- Issue date Apr 21, 2020
- International Business Machines Corporation
- Thomas B. Chadwick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for enumerating digital circuits in a system-on-a...
- Patent number 10,628,376
- Issue date Apr 21, 2020
- International Business Machines Corporation
- Thomas B. Chadwick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for enumerating digital circuits in a system-on-a...
- Patent number 10,423,570
- Issue date Sep 24, 2019
- International Business Machines Corporation
- Thomas B. Chadwick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for enumerating digital circuits in a system-on-a...
- Patent number 10,394,752
- Issue date Aug 27, 2019
- International Business Machines Corporation
- Thomas B. Chadwick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory built-in self test system
- Patent number 9,946,620
- Issue date Apr 17, 2018
- Invecas, Inc.
- Kevin W. Gorman
- G11 - INFORMATION STORAGE
Information Patent Grant
Diagnostics for a memory device
- Patent number 9,865,361
- Issue date Jan 9, 2018
- Invecas, Inc.
- Thomas Chadwick
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-domain fuse management
- Patent number 9,799,413
- Issue date Oct 24, 2017
- Invecas, Inc.
- Kevin W. Gorman
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for enumerating digital circuits in a system-on-a...
- Patent number 9,672,185
- Issue date Jun 6, 2017
- International Business Machines Corporation
- Thomas B. Chadwick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Staggered start of BIST controllers and BIST engines
- Patent number 8,935,586
- Issue date Jan 13, 2015
- International Business Machines Corporation
- Valarie H. Chickanosky
- G01 - MEASURING TESTING
Information Patent Grant
Structures including circuits for noise reduction in digital systems
- Patent number 8,037,337
- Issue date Oct 11, 2011
- International Business Machines Corporation
- Nancy H. Pratt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Supervisory operating system for running multiple child operating s...
- Patent number 7,873,961
- Issue date Jan 18, 2011
- International Business Machines Corporation
- Laura F Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High bandwidth low-latency semaphore mapped protocol (SMP) for mult...
- Patent number 7,765,351
- Issue date Jul 27, 2010
- International Business Machines Corporation
- Pascal A. Nsame
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Noise reduction in digital systems when the noise is caused by simu...
- Patent number 7,463,083
- Issue date Dec 9, 2008
- International Business Machines Corporation
- Nancy H. Pratt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Noise reduction in digital systems
- Patent number 7,317,348
- Issue date Jan 8, 2008
- International Business Machines Corporation
- Nancy H. Pratt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Auto-linking of function logic state with testcase regression list
- Patent number 6,934,656
- Issue date Aug 23, 2005
- International Business Machines Corporation
- Jason Michael Norman
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND SYSTEM FOR ENUMERATING DIGITAL CIRCUITS IN A SYSTEM-ON-A...
- Publication number 20190332570
- Publication date Oct 31, 2019
- International Business Machines Corporation
- Thomas B. CHADWICK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR ENUMERATING DIGITAL CIRCUITS IN A SYSTEM-ON-A...
- Publication number 20190332571
- Publication date Oct 31, 2019
- International Business Machines Corporation
- Thomas B. CHADWICK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Diagnostics for a Memory Device
- Publication number 20170316837
- Publication date Nov 2, 2017
- Invecas, Inc.
- Thomas Chadwick
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND SYSTEM FOR ENUMERATING DIGITAL CIRCUITS IN A SYSTEM-ON-A...
- Publication number 20170161225
- Publication date Jun 8, 2017
- International Business Machines Corporation
- Thomas B. CHADWICK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR ENUMERATING DIGITAL CIRCUITS IN A SYSTEM-ON-A...
- Publication number 20170161229
- Publication date Jun 8, 2017
- International Business Machines Corporation
- Thomas B. CHADWICK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Domain Fuse Management
- Publication number 20160224451
- Publication date Aug 4, 2016
- Invecas, Inc.
- Kevin W. Gorman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Built-In Self Test System
- Publication number 20160224450
- Publication date Aug 4, 2016
- Invecas, Inc.
- Kevin W. Gorman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR ENUMERATING DIGITAL CIRCUITS IN A SYSTEM-ON-A...
- Publication number 20150095541
- Publication date Apr 2, 2015
- International Business Machines Corporation
- Thomas B. CHADWICK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STAGGERED START OF BIST CONTROLLERS AND BIST ENGINES
- Publication number 20140129888
- Publication date May 8, 2014
- International Business Machines Corporation
- Valerie H. Chickanosky
- G01 - MEASURING TESTING
Information Patent Application
DESIGN STRUCTURES INCLUDING CIRCUITS FOR NOISE REDUCTION IN DIGITAL...
- Publication number 20090138676
- Publication date May 28, 2009
- Nancy H. Pratt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High Bandwidth Low-Latency Semaphore Mapped Protocol (SMP) For Mult...
- Publication number 20080229006
- Publication date Sep 18, 2008
- Pascal A. Nsame
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Design Structure for Localized Control Caching Resulting in Power E...
- Publication number 20080229074
- Publication date Sep 18, 2008
- International Business Machines Corporation
- Laura F. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NOISE REDUCTION IN DIGITAL SYSTEMS
- Publication number 20080068073
- Publication date Mar 20, 2008
- Nancy H. Pratt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Localized Control Caching Resulting In Power Efficient Control Logic
- Publication number 20070294519
- Publication date Dec 20, 2007
- Laura F. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NOISE REDUCTION IN DIGITAL SYSTEMS
- Publication number 20070288787
- Publication date Dec 13, 2007
- Nancy H. Pratt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUPERVISORY OPERATING SYSTEM FOR RUNNING MULTIPLE CHILD OPERATING S...
- Publication number 20070028151
- Publication date Feb 1, 2007
- International Business Machines Corporation
- Laura F. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NOISE REDUCTION IN DIGITAL SYSTEMS
- Publication number 20060082398
- Publication date Apr 20, 2006
- Nancy H. Pratt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTO-LINKING OF FUNCTION LOGIC STATE WITH TESTCASE REGRESSION LIST
- Publication number 20050096862
- Publication date May 5, 2005
- International Business Machines Corporation
- Jason Michael Norman
- G06 - COMPUTING CALCULATING COUNTING

Nancy Pratt

Person

Patents Grantslast 30 patents

Method and system for enumerating digital circuits in a system-on-a...

Method and system for enumerating digital circuits in a system-on-a...

Method and system for enumerating digital circuits in a system-on-a...

Method and system for enumerating digital circuits in a system-on-a...

Memory built-in self test system

Diagnostics for a memory device

Multi-domain fuse management

Method and system for enumerating digital circuits in a system-on-a...

Staggered start of BIST controllers and BIST engines

Structures including circuits for noise reduction in digital systems

Supervisory operating system for running multiple child operating s...

High bandwidth low-latency semaphore mapped protocol (SMP) for mult...

Noise reduction in digital systems when the noise is caused by simu...

Noise reduction in digital systems

Auto-linking of function logic state with testcase regression list

Patents Applicationslast 30 patents

METHOD AND SYSTEM FOR ENUMERATING DIGITAL CIRCUITS IN A SYSTEM-ON-A...

METHOD AND SYSTEM FOR ENUMERATING DIGITAL CIRCUITS IN A SYSTEM-ON-A...

Diagnostics for a Memory Device

METHOD AND SYSTEM FOR ENUMERATING DIGITAL CIRCUITS IN A SYSTEM-ON-A...

METHOD AND SYSTEM FOR ENUMERATING DIGITAL CIRCUITS IN A SYSTEM-ON-A...

Multi-Domain Fuse Management

Memory Built-In Self Test System

METHOD AND SYSTEM FOR ENUMERATING DIGITAL CIRCUITS IN A SYSTEM-ON-A...

STAGGERED START OF BIST CONTROLLERS AND BIST ENGINES

DESIGN STRUCTURES INCLUDING CIRCUITS FOR NOISE REDUCTION IN DIGITAL...

High Bandwidth Low-Latency Semaphore Mapped Protocol (SMP) For Mult...

Design Structure for Localized Control Caching Resulting in Power E...

NOISE REDUCTION IN DIGITAL SYSTEMS

Localized Control Caching Resulting In Power Efficient Control Logic

NOISE REDUCTION IN DIGITAL SYSTEMS

SUPERVISORY OPERATING SYSTEM FOR RUNNING MULTIPLE CHILD OPERATING S...

NOISE REDUCTION IN DIGITAL SYSTEMS

AUTO-LINKING OF FUNCTION LOGIC STATE WITH TESTCASE REGRESSION LIST