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Naoka Yano
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Tokyo, JP
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Patents Grants
last 30 patents
Information
Patent Grant
Arithmetic circuit for accumulative operation
Patent number
6,519,621
Issue date
Feb 11, 2003
Kabushiki Kaisha Toshiba
Naoka Yano
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Division circuit not requiring taking complements of divisor, divid...
Patent number
6,477,557
Issue date
Nov 5, 2002
Kabushiki Kaisha Toshiba
Naoka Yano
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
High-efficiency multiplier and multiplying method
Patent number
6,286,024
Issue date
Sep 4, 2001
Kabushiki Kaisha Toshiba
Naoka Yano
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Division circuit not requiring taking complements of divisor, divid...
Patent number
6,047,305
Issue date
Apr 4, 2000
Kabushiki Kaisha Toshiba
Naoka Yano
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Latch circuit and arithmetic unit having the same
Patent number
5,977,808
Issue date
Nov 2, 1999
Kabushiki Kaisha Toshiba
Naoka Yano
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Multiplication device and sum of products calculation device
Patent number
5,675,527
Issue date
Oct 7, 1997
Kabushiki Kaisha Toshiba
Naoka Yano
G06 - COMPUTING CALCULATING COUNTING
Patents Applications
last 30 patents
Information
Patent Application
High-efficiency multiplier and multiplying method
Publication number
20010044816
Publication date
Nov 22, 2001
Naoka Yano
G06 - COMPUTING CALCULATING COUNTING