Narasimhan Iyengar

Person

Plano, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Tristatable driver for internal data bus lines
- Patent number 5,748,556
- Issue date May 5, 1998
- SGS-Thomson Microelectronics, Inc.
- Narasimhan Iyengar
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit with improved on-chip power supply control
- Patent number 5,300,824
- Issue date Apr 5, 1994
- Texas Instruments Incorporated
- Narasimhan Iyengar
- G11 - INFORMATION STORAGE
Information Patent Grant
Read/write memory with improved test mode data compare
- Patent number 5,285,419
- Issue date Feb 8, 1994
- SGS-Thomson Microelectronics, Inc.
- Narasimhan Iyengar
- G11 - INFORMATION STORAGE
Information Patent Grant
Column redundancy architecture for a read/write memory
- Patent number 5,257,229
- Issue date Oct 26, 1993
- SGS-Thomson Microelectronics, Inc.
- David C. McClure
- G11 - INFORMATION STORAGE
Information Patent Grant
Substrate bias generator system
- Patent number 5,220,534
- Issue date Jun 15, 1993
- Texas Instruments, Incorporated
- Wah K. Loh
- G05 - CONTROLLING REGULATING
Information Patent Grant
Substrate bias voltage detection circuit
- Patent number 5,120,993
- Issue date Jun 9, 1992
- Texas Instruments Incorporated
- Ching-Yuh Tsay
- G05 - CONTROLLING REGULATING
Information Patent Grant
Integrated circuit with improved on-chip power supply control
- Patent number 5,063,304
- Issue date Nov 5, 1991
- Texas Instruments Incorporated
- Narasimhan Iyengar
- G11 - INFORMATION STORAGE

Narasimhan Iyengar

Person

Patents Grantslast 30 patents

Tristatable driver for internal data bus lines

Integrated circuit with improved on-chip power supply control

Read/write memory with improved test mode data compare

Column redundancy architecture for a read/write memory

Substrate bias generator system

Substrate bias voltage detection circuit

Integrated circuit with improved on-chip power supply control